2 * linux/drivers/ide/ide-dma.c Version 4.13 May 21, 2003
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
7 * Portions Copyright Red Hat 2003
11 * Special Thanks to Mark for his Six years of work.
13 * Copyright (c) 1995-1998 Mark Lord
14 * May be copied or modified under the terms of the GNU General Public License
18 * This module provides support for the bus-master IDE DMA functions
19 * of various PCI chipsets, including the Intel PIIX (i82371FB for
20 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
21 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
22 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
24 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
26 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
28 * By default, DMA support is prepared for use, but is currently enabled only
29 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
30 * or which are recognized as "good" (see table below). Drives with only mode0
31 * or mode1 (multi/single) DMA should also work with this chipset/driver
32 * (eg. MC2112A) but are not enabled by default.
34 * Use "hdparm -i" to view modes supported by a given drive.
36 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
37 * DMA support, but must be (re-)compiled against this kernel version or later.
39 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
40 * If problems arise, ide.c will disable DMA operation after a few retries.
41 * This error recovery mechanism works and has been extremely well exercised.
43 * IDE drives, depending on their vintage, may support several different modes
44 * of DMA operation. The boot-time modes are indicated with a "*" in
45 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
46 * the "hdparm -X" feature. There is seldom a need to do this, as drives
47 * normally power-up with their "best" PIO/DMA modes enabled.
49 * Testing has been done with a rather extensive number of drives,
50 * with Quantum & Western Digital models generally outperforming the pack,
51 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
52 * showing more lackluster throughput.
54 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
56 * Some people have reported trouble with Intel Zappa motherboards.
57 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
58 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
59 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
61 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
62 * fixing the problem with the BIOS on some Acer motherboards.
64 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
65 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
67 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
68 * at generic DMA -- his patches were referred to when preparing this code.
70 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
71 * for supplying a Promise UDMA board & WD UDMA drive for this work!
73 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
75 * ATA-66/100 and recovery functions, I forgot the rest......
79 #include <linux/config.h>
80 #define __NO_VERSION__
81 #include <linux/module.h>
82 #include <linux/types.h>
83 #include <linux/kernel.h>
84 #include <linux/timer.h>
86 #include <linux/interrupt.h>
87 #include <linux/pci.h>
88 #include <linux/init.h>
89 #include <linux/ide.h>
90 #include <linux/delay.h>
95 #define CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
97 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
99 struct drive_list_entry {
104 struct drive_list_entry drive_whitelist [] = {
106 { "Micropolis 2112A" , "ALL" },
107 { "CONNER CTMA 4000" , "ALL" },
108 { "CONNER CTT8000-A" , "ALL" },
109 { "ST34342A" , "ALL" },
113 struct drive_list_entry drive_blacklist [] = {
115 { "WDC AC11000H" , "ALL" },
116 { "WDC AC22100H" , "ALL" },
117 { "WDC AC32500H" , "ALL" },
118 { "WDC AC33100H" , "ALL" },
119 { "WDC AC31600H" , "ALL" },
120 { "WDC AC32100H" , "24.09P07" },
121 { "WDC AC23200L" , "21.10N21" },
122 { "Compaq CRD-8241B" , "ALL" },
123 { "CRD-8400B" , "ALL" },
124 { "CRD-8480B", "ALL" },
125 { "CRD-8480C", "ALL" },
126 { "CRD-8482B", "ALL" },
127 { "CRD-84" , "ALL" },
128 { "SanDisk SDP3B" , "ALL" },
129 { "SanDisk SDP3B-64" , "ALL" },
130 { "SANYO CD-ROM CRD" , "ALL" },
131 { "HITACHI CDR-8" , "ALL" },
132 { "HITACHI CDR-8335" , "ALL" },
133 { "HITACHI CDR-8435" , "ALL" },
134 { "Toshiba CD-ROM XM-6202B" , "ALL" },
135 { "CD-532E-A" , "ALL" },
136 { "E-IDE CD-ROM CR-840", "ALL" },
137 { "CD-ROM Drive/F5A", "ALL" },
138 { "RICOH CD-R/RW MP7083A", "ALL" },
139 { "WPI CDD-820", "ALL" },
140 { "SAMSUNG CD-ROM SC-140", "ALL" },
141 { "SAMSUNG CD-ROM SC-148C", "ALL" },
142 { "SAMSUNG CD-ROM SC-148F", "ALL" },
143 { "SAMSUNG CD-ROM SC", "ALL" },
144 { "SanDisk SDP3B-64" , "ALL" },
145 { "SAMSUNG CD-ROM SN-124", "ALL" },
146 { "PLEXTOR CD-R PX-W8432T", "ALL" },
147 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", "ALL" },
148 { "_NEC DV5800A", "ALL" },
154 * in_drive_list - look for drive in black/white list
155 * @id: drive identifier
156 * @drive_table: list to inspect
158 * Look for a drive in the blacklist and the whitelist tables
159 * Returns 1 if the drive is found in the table.
162 static int in_drive_list(struct hd_driveid *id, struct drive_list_entry * drive_table)
164 for ( ; drive_table->id_model ; drive_table++)
165 if ((!strcmp(drive_table->id_model, id->model)) &&
166 ((strstr(drive_table->id_firmware, id->fw_rev)) ||
167 (!strcmp(drive_table->id_firmware, "ALL"))))
172 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
175 * good_dma_drives() lists the model names (from "hdparm -i")
176 * of drives which do not support mode2 DMA but which are
177 * known to work fine with this interface under Linux.
179 const char *good_dma_drives[] = {"Micropolis 2112A",
182 "ST34342A", /* for Sun Ultra */
186 * bad_dma_drives() lists the model names (from "hdparm -i")
187 * of drives which supposedly support (U)DMA but which are
188 * known to corrupt data with this interface under Linux.
190 * This is an empirical list. Its generated from bug reports. That means
191 * while it reflects actual problem distributions it doesn't answer whether
192 * the drive or the controller, or cabling, or software, or some combination
193 * thereof is the fault. If you don't happen to agree with the kernel's
194 * opinion of your drive - use hdparm to turn DMA on.
196 const char *bad_dma_drives[] = {"WDC AC11000H",
204 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
207 * ide_dma_intr - IDE DMA interrupt handler
208 * @drive: the drive the interrupt is for
210 * Handle an interrupt completing a read/write DMA transfer on an
214 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
216 u8 stat = 0, dma_stat = 0;
219 dma_stat = HWIF(drive)->ide_dma_end(drive);
220 stat = HWIF(drive)->INB(IDE_STATUS_REG); /* get drive status */
221 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
223 struct request *rq = HWGROUP(drive)->rq;
224 // rq = HWGROUP(drive)->rq;
225 for (i = rq->nr_sectors; i > 0;) {
226 i -= rq->current_nr_sectors;
227 DRIVER(drive)->end_request(drive, 1);
231 printk("%s: dma_intr: bad DMA status (dma_stat=%x)\n",
232 drive->name, dma_stat);
234 return DRIVER(drive)->error(drive, "dma_intr", stat);
237 EXPORT_SYMBOL_GPL(ide_dma_intr);
240 * ide_build_sglist - map IDE scatter gather for DMA I/O
241 * @hwif: the interface to build the DMA table for
242 * @rq: the request holding the sg list
243 * @ddir: data direction
245 * Perform the PCI mapping magic neccessary to access the source or
246 * target buffers of a request via PCI DMA. The lower layers of the
247 * kernel provide the neccessary cache management so that we can
248 * operate in a portable fashion
251 static int ide_build_sglist (ide_hwif_t *hwif, struct request *rq, int ddir)
253 struct buffer_head *bh;
254 struct scatterlist *sg = hwif->sg_table;
255 unsigned long lastdataend = ~0UL;
258 if (hwif->sg_dma_active)
266 if (bh_phys(bh) == lastdataend)
269 if ((unsigned long) bh->b_data == lastdataend)
274 sg[nents - 1].length += bh->b_size;
275 lastdataend += bh->b_size;
279 if (nents >= PRD_ENTRIES)
282 memset(&sg[nents], 0, sizeof(*sg));
285 sg[nents].page = bh->b_page;
286 sg[nents].offset = bh_offset(bh);
287 lastdataend = bh_phys(bh) + bh->b_size;
289 if ((unsigned long) bh->b_data < PAGE_SIZE)
292 sg[nents].address = bh->b_data;
293 lastdataend = (unsigned long) bh->b_data + bh->b_size;
296 sg[nents].length = bh->b_size;
298 } while ((bh = bh->b_reqnext) != NULL);
303 hwif->sg_dma_direction = ddir;
304 return pci_map_sg(hwif->pci_dev, sg, nents, ddir);
308 * ide_raw_build_sglist - map IDE scatter gather for DMA
309 * @hwif: the interface to build the DMA table for
310 * @rq: the request holding the sg list
312 * Perform the PCI mapping magic neccessary to access the source or
313 * target buffers of a taskfile request via PCI DMA. The lower layers
314 * of the kernel provide the neccessary cache management so that we can
315 * operate in a portable fashion
318 static int ide_raw_build_sglist (ide_hwif_t *hwif, struct request *rq)
320 struct scatterlist *sg = hwif->sg_table;
322 ide_task_t *args = rq->special;
323 u8 *virt_addr = rq->buffer;
324 int sector_count = rq->nr_sectors;
326 if (args->command_type == IDE_DRIVE_TASK_RAW_WRITE)
327 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
329 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
331 if (sector_count > 128) {
332 memset(&sg[nents], 0, sizeof(*sg));
333 sg[nents].address = virt_addr;
334 sg[nents].length = 128 * SECTOR_SIZE;
336 virt_addr = virt_addr + (128 * SECTOR_SIZE);
339 memset(&sg[nents], 0, sizeof(*sg));
340 sg[nents].address = virt_addr;
341 sg[nents].length = sector_count * SECTOR_SIZE;
344 while (sector_count > 128) {
345 memset(&sg[nents], 0, sizeof(*sg));
346 sg[nents].address = virt_addr;
347 sg[nents].length = 128 * SECTOR_SIZE;
349 virt_addr = virt_addr + (128 * SECTOR_SIZE);
352 memset(&sg[nents], 0, sizeof(*sg));
353 sg[nents].address = virt_addr;
354 sg[nents].length = sector_count * SECTOR_SIZE;
357 return pci_map_sg(hwif->pci_dev, sg, nents, hwif->sg_dma_direction);
361 * ide_build_dmatable - build IDE DMA table
363 * ide_build_dmatable() prepares a dma request. We map the command
364 * to get the pci bus addresses of the buffers and then build up
365 * the PRD table that the IDE layer wants to be fed. The code
366 * knows about the 64K wrap bug in the CS5530.
368 * Returns 0 if all went okay, returns 1 otherwise.
369 * May also be invoked from trm290.c
372 int ide_build_dmatable (ide_drive_t *drive, struct request *rq, int ddir)
374 ide_hwif_t *hwif = HWIF(drive);
375 unsigned int *table = hwif->dmatable_cpu;
376 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
377 unsigned int count = 0;
379 struct scatterlist *sg;
381 if (rq->cmd == IDE_DRIVE_TASKFILE)
382 hwif->sg_nents = i = ide_raw_build_sglist(hwif, rq);
384 hwif->sg_nents = i = ide_build_sglist(hwif, rq, ddir);
390 while (i && sg_dma_len(sg)) {
394 cur_addr = sg_dma_address(sg);
395 cur_len = sg_dma_len(sg);
398 * Fill in the dma table, without crossing any 64kB boundaries.
399 * Most hardware requires 16-bit alignment of all blocks,
400 * but the trm290 requires 32-bit alignment.
404 if (count++ >= PRD_ENTRIES) {
405 printk("%s: DMA table too small\n", drive->name);
406 goto use_pio_instead;
408 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
410 if (bcount > cur_len)
412 *table++ = cpu_to_le32(cur_addr);
413 xcount = bcount & 0xffff;
415 xcount = ((xcount >> 2) - 1) << 16;
416 if (xcount == 0x0000) {
418 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
419 * but at least one (e.g. CS5530) misinterprets it as zero (!).
420 * So here we break the 64KB entry into two 32KB entries instead.
422 if (count++ >= PRD_ENTRIES) {
423 printk("%s: DMA table too small\n", drive->name);
424 goto use_pio_instead;
426 *table++ = cpu_to_le32(0x8000);
427 *table++ = cpu_to_le32(cur_addr + 0x8000);
430 *table++ = cpu_to_le32(xcount);
442 *--table |= cpu_to_le32(0x80000000);
445 printk("%s: empty DMA table?\n", drive->name);
447 pci_unmap_sg(hwif->pci_dev,
450 hwif->sg_dma_direction);
451 hwif->sg_dma_active = 0;
452 return 0; /* revert to PIO for this request */
455 EXPORT_SYMBOL_GPL(ide_build_dmatable);
458 * ide_destroy_dmatable - clean up DMA mapping
459 * @drive: The drive to unmap
461 * Teardown mappings after DMA has completed. This must be called
462 * after the completion of each use of ide_build_dmatable and before
463 * the next use of ide_build_dmatable. Failure to do so will cause
464 * an oops as only one mapping can be live for each target at a given
468 void ide_destroy_dmatable (ide_drive_t *drive)
470 struct pci_dev *dev = HWIF(drive)->pci_dev;
471 struct scatterlist *sg = HWIF(drive)->sg_table;
472 int nents = HWIF(drive)->sg_nents;
474 pci_unmap_sg(dev, sg, nents, HWIF(drive)->sg_dma_direction);
475 HWIF(drive)->sg_dma_active = 0;
478 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
481 * config_drive_for_dma - attempt to activate IDE DMA
482 * @drive: the drive to place in DMA mode
484 * If the drive supports at least mode 2 DMA or UDMA of any kind
485 * then attempt to place it into DMA mode. Drives that are known to
486 * support DMA but predate the DMA properties or that are known
487 * to have DMA handling bugs are also set up appropriately based
488 * on the good/bad drive lists.
491 static int config_drive_for_dma (ide_drive_t *drive)
493 struct hd_driveid *id = drive->id;
494 ide_hwif_t *hwif = HWIF(drive);
496 if ((id->capability & 1) && hwif->autodma) {
497 /* Consult the list of known "bad" drives */
498 if (hwif->ide_dma_bad_drive(drive))
499 return hwif->ide_dma_off(drive);
502 * Enable DMA on any drive that has
503 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
505 if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
506 return hwif->ide_dma_on(drive);
508 * Enable DMA on any drive that has mode2 DMA
509 * (multi or single) enabled
511 if (id->field_valid & 2) /* regular DMA */
512 if ((id->dma_mword & 0x404) == 0x404 ||
513 (id->dma_1word & 0x404) == 0x404)
514 return hwif->ide_dma_on(drive);
516 /* Consult the list of known "good" drives */
517 if (hwif->ide_dma_good_drive(drive))
518 return hwif->ide_dma_on(drive);
520 // if (hwif->tuneproc != NULL) hwif->tuneproc(drive, 255);
521 return hwif->ide_dma_off_quietly(drive);
525 * dma_timer_expiry - handle a DMA timeout
526 * @drive: Drive that timed out
528 * An IDE DMA transfer timed out. In the event of an error we ask
529 * the driver to resolve the problem, if a DMA transfer is still
530 * in progress we continue to wait (arguably we need to add a
531 * secondary 'I dont care what the drive thinks' timeout here)
532 * Finally if we have an interrupt we let it complete the I/O.
533 * But only one time - we clear expiry and if it's still not
534 * completed after WAIT_CMD, we error and retry in PIO.
535 * This can occur if an interrupt is lost or due to hang or bugs.
538 static int dma_timer_expiry (ide_drive_t *drive)
540 ide_hwif_t *hwif = HWIF(drive);
541 u8 dma_stat = hwif->INB(hwif->dma_status);
543 printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
544 drive->name, dma_stat);
546 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
550 * Clear the expiry handler in case we decide to wait more,
551 * next time timer expires it is an error
553 HWGROUP(drive)->expiry = NULL;
555 /* 1 dmaing, 2 error, 4 intr */
557 if (dma_stat & 2) /* ERROR */
560 if (dma_stat & 1) /* DMAing */
563 if (dma_stat & 4) /* Got an Interrupt */
566 return 0; /* Unknown status -- reset the bus */
570 * __ide_dma_no_op - dummy DMA function.
572 * This empty function prevents non-DMA controllers from causing an oops.
575 static int __ide_dma_no_op (ide_drive_t *ignored)
582 * __ide_dma_host_off - Generic DMA kill
583 * @drive: drive to control
585 * Perform the generic IDE controller DMA off operation. This
586 * works for most IDE bus mastering controllers
589 int __ide_dma_host_off (ide_drive_t *drive)
591 ide_hwif_t *hwif = HWIF(drive);
592 u8 unit = (drive->select.b.unit & 0x01);
593 u8 dma_stat = hwif->INB(hwif->dma_status);
595 hwif->OUTB((dma_stat & ~(1<<(5+unit))), hwif->dma_status);
599 EXPORT_SYMBOL(__ide_dma_host_off);
602 * __ide_dma_host_off_quietly - Generic DMA kill
603 * @drive: drive to control
605 * Turn off the current DMA on this IDE controller.
608 int __ide_dma_off_quietly (ide_drive_t *drive)
610 drive->using_dma = 0;
611 ide_toggle_bounce(drive, 0);
612 return HWIF(drive)->ide_dma_host_off(drive);
615 EXPORT_SYMBOL(__ide_dma_off_quietly);
618 * __ide_dma_host_off - Generic DMA kill
619 * @drive: drive to control
621 * Turn off the current DMA on this IDE controller. Inform the
622 * user that DMA has been disabled.
625 int __ide_dma_off (ide_drive_t *drive)
627 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
628 return HWIF(drive)->ide_dma_off_quietly(drive);
631 EXPORT_SYMBOL(__ide_dma_off);
634 * __ide_dma_host_on - Enable DMA on a host
635 * @drive: drive to enable for DMA
637 * Enable DMA on an IDE controller following generic bus mastering
638 * IDE controller behaviour
641 int __ide_dma_host_on (ide_drive_t *drive)
643 if (drive->using_dma) {
644 ide_hwif_t *hwif = HWIF(drive);
645 u8 unit = (drive->select.b.unit & 0x01);
646 u8 dma_stat = hwif->INB(hwif->dma_status);
648 hwif->OUTB((dma_stat|(1<<(5+unit))), hwif->dma_status);
654 EXPORT_SYMBOL(__ide_dma_host_on);
657 * __ide_dma_on - Enable DMA on a device
658 * @drive: drive to enable DMA on
660 * Enable IDE DMA for a device on this IDE controller.
663 int __ide_dma_on (ide_drive_t *drive)
665 drive->using_dma = 1;
666 ide_toggle_bounce(drive, 1);
667 return HWIF(drive)->ide_dma_host_on(drive);
670 EXPORT_SYMBOL(__ide_dma_on);
673 * __ide_dma_check - check DMA setup
674 * @drive: drive to check
676 * Don't use - due for extermination
679 int __ide_dma_check (ide_drive_t *drive)
681 return config_drive_for_dma(drive);
684 EXPORT_SYMBOL(__ide_dma_check);
686 int __ide_dma_read (ide_drive_t *drive /*, struct request *rq */)
688 ide_hwif_t *hwif = HWIF(drive);
689 struct request *rq = HWGROUP(drive)->rq;
690 // ide_task_t *args = rq->special;
691 unsigned int reading = 1 << 3;
692 unsigned int count = 0;
693 u8 dma_stat = 0, lba48 = (drive->addressing == 1) ? 1 : 0;
694 task_ioreg_t command = WIN_NOP;
696 if (!(count = ide_build_dmatable(drive, rq, PCI_DMA_FROMDEVICE)))
697 /* try PIO instead of DMA */
700 hwif->OUTL(hwif->dmatable_dma, hwif->dma_prdtable);
702 hwif->OUTB(reading, hwif->dma_command);
703 /* read dma_status for INTR & ERROR flags */
704 dma_stat = hwif->INB(hwif->dma_status);
705 /* clear INTR & ERROR flags */
706 hwif->OUTB(dma_stat|6, hwif->dma_status);
707 drive->waiting_for_dma = 1;
708 if (drive->media != ide_disk)
711 * FIX ME to use only ACB ide_task_t args Struct
715 ide_task_t *args = rq->special;
716 command = args->tfRegister[IDE_COMMAND_OFFSET];
719 command = (lba48) ? WIN_READDMA_EXT : WIN_READDMA;
720 if (rq->cmd == IDE_DRIVE_TASKFILE) {
721 ide_task_t *args = rq->special;
722 command = args->tfRegister[IDE_COMMAND_OFFSET];
725 /* issue cmd to drive */
726 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
727 return HWIF(drive)->ide_dma_count(drive);
730 EXPORT_SYMBOL(__ide_dma_read);
732 int __ide_dma_write (ide_drive_t *drive /*, struct request *rq */)
734 ide_hwif_t *hwif = HWIF(drive);
735 struct request *rq = HWGROUP(drive)->rq;
736 // ide_task_t *args = rq->special;
737 unsigned int reading = 0;
738 unsigned int count = 0;
739 u8 dma_stat = 0, lba48 = (drive->addressing == 1) ? 1 : 0;
740 task_ioreg_t command = WIN_NOP;
742 if (!(count = ide_build_dmatable(drive, rq, PCI_DMA_TODEVICE)))
743 /* try PIO instead of DMA */
746 hwif->OUTL(hwif->dmatable_dma, hwif->dma_prdtable);
748 hwif->OUTB(reading, hwif->dma_command);
749 /* read dma_status for INTR & ERROR flags */
750 dma_stat = hwif->INB(hwif->dma_status);
751 /* clear INTR & ERROR flags */
752 hwif->OUTB(dma_stat|6, hwif->dma_status);
753 drive->waiting_for_dma = 1;
754 if (drive->media != ide_disk)
757 * FIX ME to use only ACB ide_task_t args Struct
761 ide_task_t *args = rq->special;
762 command = args->tfRegister[IDE_COMMAND_OFFSET];
765 command = (lba48) ? WIN_WRITEDMA_EXT : WIN_WRITEDMA;
766 if (rq->cmd == IDE_DRIVE_TASKFILE) {
767 ide_task_t *args = rq->special;
768 command = args->tfRegister[IDE_COMMAND_OFFSET];
771 /* issue cmd to drive */
772 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
773 return HWIF(drive)->ide_dma_count(drive);
776 EXPORT_SYMBOL(__ide_dma_write);
778 int __ide_dma_begin (ide_drive_t *drive)
780 ide_hwif_t *hwif = HWIF(drive);
781 u8 dma_cmd = hwif->INB(hwif->dma_command);
783 /* Note that this is done *after* the cmd has
784 * been issued to the drive, as per the BM-IDE spec.
785 * The Promise Ultra33 doesn't work correctly when
786 * we do this part before issuing the drive cmd.
789 hwif->OUTB(dma_cmd|1, hwif->dma_command);
793 EXPORT_SYMBOL(__ide_dma_begin);
795 /* returns 1 on error, 0 otherwise */
796 int __ide_dma_end (ide_drive_t *drive)
798 ide_hwif_t *hwif = HWIF(drive);
799 u8 dma_stat = 0, dma_cmd = 0;
801 drive->waiting_for_dma = 0;
802 /* get dma_command mode */
803 dma_cmd = hwif->INB(hwif->dma_command);
805 hwif->OUTB(dma_cmd&~1, hwif->dma_command);
807 dma_stat = hwif->INB(hwif->dma_status);
808 /* clear the INTR & ERROR bits */
809 hwif->OUTB(dma_stat|6, hwif->dma_status);
810 /* purge DMA mappings */
811 ide_destroy_dmatable(drive);
812 /* verify good DMA status */
813 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
816 EXPORT_SYMBOL(__ide_dma_end);
818 /* returns 1 if dma irq issued, 0 otherwise */
819 int __ide_dma_test_irq (ide_drive_t *drive)
821 ide_hwif_t *hwif = HWIF(drive);
822 u8 dma_stat = hwif->INB(hwif->dma_status);
824 #if 0 /* do not set unless you know what you are doing */
826 u8 stat = hwif->INB(IDE_STATUS_REG);
827 hwif->OUTB(hwif->dma_status, dma_stat & 0xE4);
830 /* return 1 if INTR asserted */
831 if ((dma_stat & 4) == 4)
833 if (!drive->waiting_for_dma)
834 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
835 drive->name, __FUNCTION__);
837 drive->waiting_for_dma++;
842 EXPORT_SYMBOL(__ide_dma_test_irq);
844 int __ide_dma_bad_drive (ide_drive_t *drive)
846 struct hd_driveid *id = drive->id;
848 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
849 int blacklist = in_drive_list(id, drive_blacklist);
851 printk("%s: Disabling (U)DMA for %s\n", drive->name, id->model);
854 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
856 /* Consult the list of known "bad" drives */
857 list = bad_dma_drives;
859 if (!strcmp(*list++,id->model)) {
860 printk("%s: Disabling (U)DMA for %s\n",
861 drive->name, id->model);
865 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
869 EXPORT_SYMBOL(__ide_dma_bad_drive);
871 int __ide_dma_good_drive (ide_drive_t *drive)
873 struct hd_driveid *id = drive->id;
875 #ifdef CONFIG_IDEDMA_NEW_DRIVE_LISTINGS
876 return in_drive_list(id, drive_whitelist);
877 #else /* !CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
879 /* Consult the list of known "good" drives */
880 list = good_dma_drives;
882 if (!strcmp(*list++,id->model))
885 #endif /* CONFIG_IDEDMA_NEW_DRIVE_LISTINGS */
889 EXPORT_SYMBOL(__ide_dma_good_drive);
892 * Used for HOST FIFO counters for VDMA
893 * PIO over DMA, effective ATA-Bridge operator.
895 int __ide_dma_count (ide_drive_t *drive)
897 return HWIF(drive)->ide_dma_begin(drive);
900 EXPORT_SYMBOL(__ide_dma_count);
902 int __ide_dma_verbose (ide_drive_t *drive)
904 struct hd_driveid *id = drive->id;
905 ide_hwif_t *hwif = HWIF(drive);
907 if (id->field_valid & 4) {
908 if ((id->dma_ultra >> 8) && (id->dma_mword >> 8)) {
909 printk(", BUG DMA OFF");
910 return hwif->ide_dma_off_quietly(drive);
912 if (id->dma_ultra & ((id->dma_ultra >> 8) & hwif->ultra_mask)) {
913 if (((id->dma_ultra >> 11) & 0x1F) &&
914 eighty_ninty_three(drive)) {
915 if ((id->dma_ultra >> 15) & 1) {
916 printk(", UDMA(mode 7)");
917 } else if ((id->dma_ultra >> 14) & 1) {
918 printk(", UDMA(133)");
919 } else if ((id->dma_ultra >> 13) & 1) {
920 printk(", UDMA(100)");
921 } else if ((id->dma_ultra >> 12) & 1) {
922 printk(", UDMA(66)");
923 } else if ((id->dma_ultra >> 11) & 1) {
924 printk(", UDMA(44)");
929 if ((id->dma_ultra >> 10) & 1) {
930 printk(", UDMA(33)");
931 } else if ((id->dma_ultra >> 9) & 1) {
932 printk(", UDMA(25)");
933 } else if ((id->dma_ultra >> 8) & 1) {
934 printk(", UDMA(16)");
938 printk(", (U)DMA"); /* Can be BIOS-enabled! */
940 } else if (id->field_valid & 2) {
941 if ((id->dma_mword >> 8) && (id->dma_1word >> 8)) {
942 printk(", BUG DMA OFF");
943 return hwif->ide_dma_off_quietly(drive);
946 } else if (id->field_valid & 1) {
952 EXPORT_SYMBOL(__ide_dma_verbose);
955 * __ide_dma_retune - default retune handler
956 * @drive: drive to retune
958 * Default behaviour when we decide to return the IDE DMA setup.
959 * The default behaviour is "we don't"
962 int __ide_dma_retune (ide_drive_t *drive)
964 printk(KERN_WARNING "%s: chipset supported call only\n", __FUNCTION__);
968 EXPORT_SYMBOL(__ide_dma_retune);
970 int __ide_dma_lostirq (ide_drive_t *drive)
972 printk("%s: DMA interrupt recovery\n", drive->name);
976 EXPORT_SYMBOL(__ide_dma_lostirq);
978 int __ide_dma_timeout (ide_drive_t *drive)
980 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
981 if (HWIF(drive)->ide_dma_test_irq(drive))
983 return HWIF(drive)->ide_dma_end(drive);
986 EXPORT_SYMBOL(__ide_dma_timeout);
989 * Needed for allowing full modular support of ide-driver
991 int ide_release_dma_engine (ide_hwif_t *hwif)
993 if (hwif->dmatable_cpu) {
994 pci_free_consistent(hwif->pci_dev,
995 PRD_ENTRIES * PRD_BYTES,
998 hwif->dmatable_cpu = NULL;
1000 if (hwif->sg_table) {
1001 kfree(hwif->sg_table);
1002 hwif->sg_table = NULL;
1007 int ide_release_mmio_dma (ide_hwif_t *hwif)
1009 if ((hwif->dma_extra) && (hwif->channel == 0))
1010 release_mem_region((hwif->dma_base + 16), hwif->dma_extra);
1011 release_mem_region(hwif->dma_base, 8);
1012 if (hwif->dma_base2)
1013 release_mem_region(hwif->dma_base, 8);
1017 int ide_release_iomio_dma (ide_hwif_t *hwif)
1019 if ((hwif->dma_extra) && (hwif->channel == 0))
1020 release_region((hwif->dma_base + 16), hwif->dma_extra);
1021 release_region(hwif->dma_base, 8);
1022 if (hwif->dma_base2)
1023 release_region(hwif->dma_base, 8);
1028 * Needed for allowing full modular support of ide-driver
1030 int ide_release_dma (ide_hwif_t *hwif)
1032 if (hwif->chipset == ide_etrax100)
1035 ide_release_dma_engine(hwif);
1040 return ide_release_mmio_dma(hwif);
1041 return ide_release_iomio_dma(hwif);
1044 int ide_allocate_dma_engine (ide_hwif_t *hwif)
1046 hwif->dmatable_cpu = pci_alloc_consistent(hwif->pci_dev,
1047 PRD_ENTRIES * PRD_BYTES,
1048 &hwif->dmatable_dma);
1049 hwif->sg_table = kmalloc(sizeof(struct scatterlist) * PRD_ENTRIES,
1052 if ((hwif->dmatable_cpu) && (hwif->sg_table))
1055 printk(KERN_ERR "%s: -- Error, unable to allocate%s%s table(s).\n",
1056 (hwif->dmatable_cpu == NULL) ? " CPU" : "",
1057 (hwif->sg_table == NULL) ? " SG DMA" : " DMA",
1060 ide_release_dma_engine(hwif);
1064 int ide_mapped_mmio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
1066 printk(KERN_INFO " %s: MMIO-DMA ", hwif->name);
1067 hwif->dma_base = base;
1068 if ((hwif->cds->extra) && (hwif->channel == 0))
1069 hwif->dma_extra = hwif->cds->extra;
1071 /* There is an issue to watch here. The master might not be
1072 registered because the BIOS disabled it. Eventually this should
1073 be fixed by always registering the mate */
1075 if(hwif->mate == NULL)
1076 hwif->dma_master = base;
1078 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
1082 int ide_mmio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
1084 printk(KERN_INFO " %s: MMIO-DMA at 0x%08lx-0x%08lx",
1085 hwif->name, base, base + ports - 1);
1086 if (check_mem_region(base, ports)) {
1087 printk(" -- Error, MMIO ports already in use.\n");
1090 request_mem_region(base, ports, hwif->name);
1091 hwif->dma_base = base;
1092 if ((hwif->cds->extra) && (hwif->channel == 0)) {
1093 request_region(base+16, hwif->cds->extra, hwif->cds->name);
1094 hwif->dma_extra = hwif->cds->extra;
1097 /* There is an issue to watch here. The master might not be
1098 registered because the BIOS disabled it. Eventually this should
1099 be fixed by always registering the mate */
1101 if(hwif->mate == NULL)
1102 hwif->dma_master = base;
1104 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
1105 if (hwif->dma_base2) {
1106 if (!check_mem_region(hwif->dma_base2, ports))
1107 request_mem_region(hwif->dma_base2, ports, hwif->name);
1112 int ide_iomio_dma (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
1114 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx",
1115 hwif->name, base, base + ports - 1);
1116 if (!request_region(base, ports, hwif->name)) {
1117 printk(" -- Error, ports in use.\n");
1120 hwif->dma_base = base;
1121 if ((hwif->cds->extra) && (hwif->channel == 0)) {
1122 request_region(base+16, hwif->cds->extra, hwif->cds->name);
1123 hwif->dma_extra = hwif->cds->extra;
1125 /* There is an issue to watch here. The master might not be
1126 registered because the BIOS disabled it. Eventually this should
1127 be fixed by always registering the mate */
1129 if(hwif->mate == NULL)
1130 hwif->dma_master = base;
1132 hwif->dma_master = (hwif->channel) ? hwif->mate->dma_base : base;
1133 if (hwif->dma_base2) {
1134 if (!request_region(hwif->dma_base2, ports, hwif->name))
1136 printk(" -- Error, secondary ports in use.\n");
1137 release_region(base, ports);
1147 int ide_dma_iobase (ide_hwif_t *hwif, unsigned long base, unsigned int ports)
1149 if (hwif->mmio == 2)
1150 return ide_mapped_mmio_dma(hwif, base, ports);
1152 return ide_mmio_dma(hwif, base, ports);
1153 return ide_iomio_dma(hwif, base, ports);
1157 * This can be called for a dynamically installed interface. Don't __init it
1159 void ide_setup_dma (ide_hwif_t *hwif, unsigned long dma_base, unsigned int num_ports)
1161 if (ide_dma_iobase(hwif, dma_base, num_ports))
1164 if (ide_allocate_dma_engine(hwif)) {
1165 ide_release_dma(hwif);
1169 if (!(hwif->dma_command))
1170 hwif->dma_command = hwif->dma_base;
1171 if (!(hwif->dma_vendor1))
1172 hwif->dma_vendor1 = (hwif->dma_base + 1);
1173 if (!(hwif->dma_status))
1174 hwif->dma_status = (hwif->dma_base + 2);
1175 if (!(hwif->dma_vendor3))
1176 hwif->dma_vendor3 = (hwif->dma_base + 3);
1177 if (!(hwif->dma_prdtable))
1178 hwif->dma_prdtable = (hwif->dma_base + 4);
1180 if (!hwif->ide_dma_off)
1181 hwif->ide_dma_off = &__ide_dma_off;
1182 if (!hwif->ide_dma_off_quietly)
1183 hwif->ide_dma_off_quietly = &__ide_dma_off_quietly;
1184 if (!hwif->ide_dma_host_off)
1185 hwif->ide_dma_host_off = &__ide_dma_host_off;
1186 if (!hwif->ide_dma_on)
1187 hwif->ide_dma_on = &__ide_dma_on;
1188 if (!hwif->ide_dma_host_on)
1189 hwif->ide_dma_host_on = &__ide_dma_host_on;
1190 if (!hwif->ide_dma_check)
1191 hwif->ide_dma_check = &__ide_dma_check;
1192 if (!hwif->ide_dma_read)
1193 hwif->ide_dma_read = &__ide_dma_read;
1194 if (!hwif->ide_dma_write)
1195 hwif->ide_dma_write = &__ide_dma_write;
1196 if (!hwif->ide_dma_count)
1197 hwif->ide_dma_count = &__ide_dma_count;
1198 if (!hwif->ide_dma_begin)
1199 hwif->ide_dma_begin = &__ide_dma_begin;
1200 if (!hwif->ide_dma_end)
1201 hwif->ide_dma_end = &__ide_dma_end;
1202 if (!hwif->ide_dma_test_irq)
1203 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
1204 if (!hwif->ide_dma_bad_drive)
1205 hwif->ide_dma_bad_drive = &__ide_dma_bad_drive;
1206 if (!hwif->ide_dma_good_drive)
1207 hwif->ide_dma_good_drive = &__ide_dma_good_drive;
1208 if (!hwif->ide_dma_verbose)
1209 hwif->ide_dma_verbose = &__ide_dma_verbose;
1210 if (!hwif->ide_dma_timeout)
1211 hwif->ide_dma_timeout = &__ide_dma_timeout;
1212 if (!hwif->ide_dma_retune)
1213 hwif->ide_dma_retune = &__ide_dma_retune;
1214 if (!hwif->ide_dma_lostirq)
1215 hwif->ide_dma_lostirq = &__ide_dma_lostirq;
1217 if (hwif->chipset != ide_trm290) {
1218 u8 dma_stat = hwif->INB(hwif->dma_status);
1219 printk(", BIOS settings: %s:%s, %s:%s",
1220 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "pio",
1221 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "pio");
1225 if (!(hwif->dma_master))
1229 EXPORT_SYMBOL_GPL(ide_setup_dma);
1232 * For IDE interfaces that do not support DMA, we still need to
1233 * initialize some pointers to dummy functions.
1235 void ide_setup_no_dma (ide_hwif_t *hwif)
1237 if (!hwif->ide_dma_off_quietly)
1238 hwif->ide_dma_off_quietly = &__ide_dma_no_op;
1239 if (!hwif->ide_dma_host_off)
1240 hwif->ide_dma_host_off = &__ide_dma_no_op;
1241 if (!hwif->ide_dma_host_on)
1242 hwif->ide_dma_host_on = &__ide_dma_no_op;
1245 EXPORT_SYMBOL_GPL(ide_setup_no_dma);