added mtd driver
[linux-2.4.git] / drivers / ieee1394 / video1394.c
1 /*
2  * video1394.c - video driver for OHCI 1394 boards
3  * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
4  *                        Peter Schlaile <udbz@rz.uni-karlsruhe.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software Foundation,
18  * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19  */
20
21 /* jds -- add private data to file to keep track of iso contexts associated
22    with each open -- so release won't kill all iso transfers */
23
24 /* Damien Douxchamps: Fix failure when the number of DMA pages per frame is
25    one */
26
27 #include <linux/config.h>
28 #include <linux/kernel.h>
29 #include <linux/list.h>
30 #include <linux/slab.h>
31 #include <linux/interrupt.h>
32 #include <linux/wait.h>
33 #include <linux/errno.h>
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/pci.h>
37 #include <linux/fs.h>
38 #include <linux/poll.h>
39 #include <linux/smp_lock.h>
40 #include <linux/proc_fs.h>
41 #include <linux/delay.h>
42 #include <linux/devfs_fs_kernel.h>
43 #include <linux/bitops.h>
44 #include <linux/types.h>
45 #include <linux/wrapper.h>
46 #include <linux/vmalloc.h>
47 #include <linux/timex.h>
48 #include <linux/mm.h>
49
50 #include "ieee1394.h"
51 #include "ieee1394_types.h"
52 #include "nodemgr.h"
53 #include "hosts.h"
54 #include "ieee1394_core.h"
55 #include "highlevel.h"
56 #include "video1394.h"
57 #include "dma.h"
58
59 #include "ohci1394.h"
60
61 #define ISO_CHANNELS 64
62
63 #ifndef virt_to_page
64 #define virt_to_page(x) MAP_NR(x)
65 #endif
66
67 #ifndef vmalloc_32
68 #define vmalloc_32(x) vmalloc(x)
69 #endif
70
71 struct it_dma_prg {
72         struct dma_cmd begin;
73         quadlet_t data[4];
74         struct dma_cmd end;
75         quadlet_t pad[4]; /* FIXME: quick hack for memory alignment */
76 };
77
78 struct dma_iso_ctx {
79         struct ti_ohci *ohci;
80         int type; /* OHCI_ISO_TRANSMIT or OHCI_ISO_RECEIVE */
81         struct ohci1394_iso_tasklet iso_tasklet;
82         int channel;
83         int ctx;
84         int last_buffer;
85         int * next_buffer;  /* For ISO Transmit of video packets
86                                to write the correct SYT field
87                                into the next block */
88         unsigned int num_desc;
89         unsigned int buf_size;
90         unsigned int frame_size;
91         unsigned int packet_size;
92         unsigned int left_size;
93         unsigned int nb_cmd;
94
95         struct dma_region dma;
96
97         struct dma_prog_region *prg_reg;
98
99         struct dma_cmd **ir_prg;
100         struct it_dma_prg **it_prg;
101
102         unsigned int *buffer_status;
103         struct timeval *buffer_time; /* time when the buffer was received */
104         unsigned int *last_used_cmd; /* For ISO Transmit with 
105                                         variable sized packets only ! */
106         int ctrlClear;
107         int ctrlSet;
108         int cmdPtr;
109         int ctxMatch;
110         wait_queue_head_t waitq;
111         spinlock_t lock;
112         unsigned int syt_offset;
113         int flags;
114
115         struct list_head link;
116 };
117
118 struct video_card {
119         struct ti_ohci *ohci;
120         devfs_handle_t devfs;
121 };
122
123
124 struct file_ctx {
125         struct video_card *video;
126         struct list_head context_list;
127         struct dma_iso_ctx *current_ctx;
128 };
129
130 #ifdef CONFIG_IEEE1394_VERBOSEDEBUG
131 #define VIDEO1394_DEBUG
132 #endif
133
134 #ifdef DBGMSG
135 #undef DBGMSG
136 #endif
137
138 #ifdef VIDEO1394_DEBUG
139 #define DBGMSG(card, fmt, args...) \
140 printk(KERN_INFO "video1394_%d: " fmt "\n" , card , ## args)
141 #else
142 #define DBGMSG(card, fmt, args...)
143 #endif
144
145 /* print general (card independent) information */
146 #define PRINT_G(level, fmt, args...) \
147 printk(level "video1394: " fmt "\n" , ## args)
148
149 /* print card specific information */
150 #define PRINT(level, card, fmt, args...) \
151 printk(level "video1394_%d: " fmt "\n" , card , ## args)
152
153 void wakeup_dma_ir_ctx(unsigned long l);
154 void wakeup_dma_it_ctx(unsigned long l);
155
156 static devfs_handle_t devfs_handle;
157
158 static struct hpsb_highlevel video1394_highlevel;
159
160 static int free_dma_iso_ctx(struct dma_iso_ctx *d)
161 {
162         int i;
163         
164         DBGMSG(d->ohci->id, "Freeing dma_iso_ctx %d", d->ctx);
165
166         ohci1394_stop_context(d->ohci, d->ctrlClear, NULL);
167         if (d->iso_tasklet.link.next != NULL)
168                 ohci1394_unregister_iso_tasklet(d->ohci, &d->iso_tasklet);
169
170         dma_region_free(&d->dma);
171
172         if (d->prg_reg) {
173                 for (i = 0; i < d->num_desc; i++)
174                         dma_prog_region_free(&d->prg_reg[i]);
175                 kfree(d->prg_reg);
176         }
177
178         if (d->ir_prg)
179                 kfree(d->ir_prg);
180
181         if (d->it_prg)
182                 kfree(d->it_prg);
183
184         if (d->buffer_status)
185                 kfree(d->buffer_status);
186         if (d->buffer_time)
187                 kfree(d->buffer_time);
188         if (d->last_used_cmd)
189                 kfree(d->last_used_cmd);
190         if (d->next_buffer)
191                 kfree(d->next_buffer);
192
193         list_del(&d->link);
194
195         kfree(d);
196
197         return 0;
198 }
199
200 static struct dma_iso_ctx *
201 alloc_dma_iso_ctx(struct ti_ohci *ohci, int type, int num_desc,
202                   int buf_size, int channel, unsigned int packet_size)
203 {
204         struct dma_iso_ctx *d;
205         int i;
206
207         d = kmalloc(sizeof(struct dma_iso_ctx), GFP_KERNEL);
208         if (d == NULL) {
209                 PRINT(KERN_ERR, ohci->id, "Failed to allocate dma_iso_ctx");
210                 return NULL;
211         }
212
213         memset(d, 0, sizeof *d);
214
215         d->ohci = ohci;
216         d->type = type;
217         d->channel = channel;
218         d->num_desc = num_desc;
219         d->frame_size = buf_size;
220         d->buf_size = PAGE_ALIGN(buf_size);
221         d->last_buffer = -1;
222         INIT_LIST_HEAD(&d->link);
223         init_waitqueue_head(&d->waitq);
224
225         /* Init the regions for easy cleanup */
226         dma_region_init(&d->dma);
227
228         if (dma_region_alloc(&d->dma, d->num_desc * d->buf_size, ohci->dev,
229                              PCI_DMA_BIDIRECTIONAL)) {
230                 PRINT(KERN_ERR, ohci->id, "Failed to allocate dma buffer");
231                 free_dma_iso_ctx(d);
232                 return NULL;
233         }
234
235         if (type == OHCI_ISO_RECEIVE)
236                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
237                                           wakeup_dma_ir_ctx,
238                                           (unsigned long) d);
239         else
240                 ohci1394_init_iso_tasklet(&d->iso_tasklet, type,
241                                           wakeup_dma_it_ctx,
242                                           (unsigned long) d);
243
244         if (ohci1394_register_iso_tasklet(ohci, &d->iso_tasklet) < 0) {
245                 PRINT(KERN_ERR, ohci->id, "no free iso %s contexts",
246                       type == OHCI_ISO_RECEIVE ? "receive" : "transmit");
247                 free_dma_iso_ctx(d);
248                 return NULL;
249         }
250         d->ctx = d->iso_tasklet.context;
251
252         d->prg_reg = kmalloc(d->num_desc * sizeof(struct dma_prog_region),
253                         GFP_KERNEL);
254         if (d->prg_reg == NULL) {
255                 PRINT(KERN_ERR, ohci->id, "Failed to allocate ir prg regs");
256                 free_dma_iso_ctx(d);
257                 return NULL;
258         }
259         /* Makes for easier cleanup */
260         for (i = 0; i < d->num_desc; i++)
261                 dma_prog_region_init(&d->prg_reg[i]);
262
263         if (type == OHCI_ISO_RECEIVE) {
264                 d->ctrlSet = OHCI1394_IsoRcvContextControlSet+32*d->ctx;
265                 d->ctrlClear = OHCI1394_IsoRcvContextControlClear+32*d->ctx;
266                 d->cmdPtr = OHCI1394_IsoRcvCommandPtr+32*d->ctx;
267                 d->ctxMatch = OHCI1394_IsoRcvContextMatch+32*d->ctx;
268
269                 d->ir_prg = kmalloc(d->num_desc * sizeof(struct dma_cmd *), 
270                                     GFP_KERNEL);
271
272                 if (d->ir_prg == NULL) {
273                         PRINT(KERN_ERR, ohci->id, "Failed to allocate dma ir prg");
274                         free_dma_iso_ctx(d);
275                         return NULL;
276                 }
277                 memset(d->ir_prg, 0, d->num_desc * sizeof(struct dma_cmd *));
278
279                 d->nb_cmd = d->buf_size / PAGE_SIZE + 1;
280                 d->left_size = (d->frame_size % PAGE_SIZE) ?
281                         d->frame_size % PAGE_SIZE : PAGE_SIZE;
282  
283                 for (i = 0;i < d->num_desc; i++) {
284                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
285                                                   sizeof(struct dma_cmd), ohci->dev)) {
286                                 PRINT(KERN_ERR, ohci->id, "Failed to allocate dma ir prg");
287                                 free_dma_iso_ctx(d);
288                                 return NULL;
289                         }
290                         d->ir_prg[i] = (struct dma_cmd *)d->prg_reg[i].kvirt;
291                 }
292
293         } else {  /* OHCI_ISO_TRANSMIT */
294                 d->ctrlSet = OHCI1394_IsoXmitContextControlSet+16*d->ctx;
295                 d->ctrlClear = OHCI1394_IsoXmitContextControlClear+16*d->ctx;
296                 d->cmdPtr = OHCI1394_IsoXmitCommandPtr+16*d->ctx;
297
298                 d->it_prg = kmalloc(d->num_desc * sizeof(struct it_dma_prg *), 
299                                     GFP_KERNEL);
300
301                 if (d->it_prg == NULL) {
302                         PRINT(KERN_ERR, ohci->id, 
303                               "Failed to allocate dma it prg");
304                         free_dma_iso_ctx(d);
305                         return NULL;
306                 }
307                 memset(d->it_prg, 0, d->num_desc*sizeof(struct it_dma_prg *));
308                 
309                 d->packet_size = packet_size;
310
311                 if (PAGE_SIZE % packet_size || packet_size>4096) {
312                         PRINT(KERN_ERR, ohci->id, 
313                               "Packet size %d (page_size: %ld) "
314                               "not yet supported\n",
315                               packet_size, PAGE_SIZE);
316                         free_dma_iso_ctx(d);
317                         return NULL;
318                 }
319
320                 d->nb_cmd = d->frame_size / d->packet_size;
321                 if (d->frame_size % d->packet_size) {
322                         d->nb_cmd++;
323                         d->left_size = d->frame_size % d->packet_size;
324                 } else
325                         d->left_size = d->packet_size;
326
327                 for (i = 0; i < d->num_desc; i++) {
328                         if (dma_prog_region_alloc(&d->prg_reg[i], d->nb_cmd *
329                                                 sizeof(struct it_dma_prg), ohci->dev)) {
330                                 PRINT(KERN_ERR, ohci->id, "Failed to allocate dma it prg");
331                                 free_dma_iso_ctx(d);
332                                 return NULL;
333                         }
334                         d->it_prg[i] = (struct it_dma_prg *)d->prg_reg[i].kvirt;
335                 }
336         }
337
338         d->buffer_status = kmalloc(d->num_desc * sizeof(unsigned int),
339                                    GFP_KERNEL);
340         d->buffer_time = kmalloc(d->num_desc * sizeof(struct timeval),
341                                    GFP_KERNEL);
342         d->last_used_cmd = kmalloc(d->num_desc * sizeof(unsigned int),
343                                    GFP_KERNEL);
344         d->next_buffer = kmalloc(d->num_desc * sizeof(int),
345                                  GFP_KERNEL);
346
347         if (d->buffer_status == NULL) {
348                 PRINT(KERN_ERR, ohci->id, "Failed to allocate buffer_status");
349                 free_dma_iso_ctx(d);
350                 return NULL;
351         }
352         if (d->buffer_time == NULL) {
353                 PRINT(KERN_ERR, ohci->id, "Failed to allocate buffer_time");
354                 free_dma_iso_ctx(d);
355                 return NULL;
356         }
357         if (d->last_used_cmd == NULL) {
358                 PRINT(KERN_ERR, ohci->id, "Failed to allocate last_used_cmd");
359                 free_dma_iso_ctx(d);
360                 return NULL;
361         }
362         if (d->next_buffer == NULL) {
363                 PRINT(KERN_ERR, ohci->id, "Failed to allocate next_buffer");
364                 free_dma_iso_ctx(d);
365                 return NULL;
366         }
367         memset(d->buffer_status, 0, d->num_desc * sizeof(unsigned int));
368         memset(d->buffer_time, 0, d->num_desc * sizeof(struct timeval));
369         memset(d->last_used_cmd, 0, d->num_desc * sizeof(unsigned int));
370         memset(d->next_buffer, -1, d->num_desc * sizeof(int));
371         
372         spin_lock_init(&d->lock);
373
374         PRINT(KERN_INFO, ohci->id, "Iso %s DMA: %d buffers "
375               "of size %d allocated for a frame size %d, each with %d prgs",
376               (type == OHCI_ISO_RECEIVE) ? "receive" : "transmit",
377               d->num_desc, d->buf_size, d->frame_size, d->nb_cmd);
378
379         return d;
380 }
381
382 static void reset_ir_status(struct dma_iso_ctx *d, int n)
383 {
384         int i;
385         d->ir_prg[n][0].status = cpu_to_le32(4);
386         d->ir_prg[n][1].status = cpu_to_le32(PAGE_SIZE-4);
387         for (i = 2; i < d->nb_cmd - 1; i++)
388                 d->ir_prg[n][i].status = cpu_to_le32(PAGE_SIZE);
389         d->ir_prg[n][i].status = cpu_to_le32(d->left_size);
390 }
391
392 static void initialize_dma_ir_prg(struct dma_iso_ctx *d, int n, int flags)
393 {
394         struct dma_cmd *ir_prg = d->ir_prg[n];
395         struct dma_prog_region *ir_reg = &d->prg_reg[n];
396         unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size;
397         int i;
398
399         /* the first descriptor will read only 4 bytes */
400         ir_prg[0].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
401                 DMA_CTL_BRANCH | 4);
402
403         /* set the sync flag */
404         if (flags & VIDEO1394_SYNC_FRAMES)
405                 ir_prg[0].control |= cpu_to_le32(DMA_CTL_WAIT);
406
407         ir_prg[0].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, buf -
408                                 (unsigned long)d->dma.kvirt));
409         ir_prg[0].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
410                                         1 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
411         /* if there is *not* only one DMA page per frame (hence, d->nb_cmd==2) */
412         if (d->nb_cmd>2) {
413                 /* the second descriptor will read PAGE_SIZE-4 bytes */
414                 ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE |
415                                                 DMA_CTL_BRANCH | (PAGE_SIZE-4));
416                 ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf + 4) -
417                                                 (unsigned long)d->dma.kvirt));
418                 ir_prg[1].branchAddress = cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
419                                            2 * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
420         
421                 for (i=2;i<d->nb_cmd-1;i++) {
422                         ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | 
423                                                         DMA_CTL_BRANCH | PAGE_SIZE);
424                         ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
425                                                         (buf+(i-1)*PAGE_SIZE) -
426                                                         (unsigned long)d->dma.kvirt));
427
428                         ir_prg[i].branchAddress =
429                                      cpu_to_le32((dma_prog_region_offset_to_bus(ir_reg,
430                                      (i + 1) * sizeof(struct dma_cmd)) & 0xfffffff0) | 0x1);
431                 }
432
433                 /* the last descriptor will generate an interrupt */
434                 ir_prg[i].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | 
435                                                 DMA_CTL_IRQ | DMA_CTL_BRANCH | d->left_size);
436                 ir_prg[i].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
437                                                 (buf+(i-1)*PAGE_SIZE) -
438                                                 (unsigned long)d->dma.kvirt));
439         }
440         else { 
441                /* only one DMA page is used. Read d->left_size immediately and */
442                /* generate an interrupt as this is also the last page */
443                ir_prg[1].control = cpu_to_le32(DMA_CTL_INPUT_MORE | DMA_CTL_UPDATE | 
444                                            DMA_CTL_IRQ | DMA_CTL_BRANCH | (d->left_size-4));
445                ir_prg[1].address = cpu_to_le32(dma_region_offset_to_bus(&d->dma,
446                                                (buf + 4) - (unsigned long)d->dma.kvirt));
447         }
448 }
449         
450 static void initialize_dma_ir_ctx(struct dma_iso_ctx *d, int tag, int flags)
451 {
452         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
453         int i;
454
455         d->flags = flags;
456
457         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
458
459         for (i=0;i<d->num_desc;i++) {
460                 initialize_dma_ir_prg(d, i, flags);
461                 reset_ir_status(d, i);
462         }
463
464         /* reset the ctrl register */
465         reg_write(ohci, d->ctrlClear, 0xf0000000);
466
467         /* Set bufferFill */
468         reg_write(ohci, d->ctrlSet, 0x80000000);
469
470         /* Set isoch header */
471         if (flags & VIDEO1394_INCLUDE_ISO_HEADERS) 
472                 reg_write(ohci, d->ctrlSet, 0x40000000);
473
474         /* Set the context match register to match on all tags, 
475            sync for sync tag, and listen to d->channel */
476         reg_write(ohci, d->ctxMatch, 0xf0000000|((tag&0xf)<<8)|d->channel);
477         
478         /* Set up isoRecvIntMask to generate interrupts */
479         reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1<<d->ctx);
480 }
481
482 /* find which context is listening to this channel */
483 static struct dma_iso_ctx *
484 find_ctx(struct list_head *list, int type, int channel)
485 {
486         struct list_head *lh;
487
488         list_for_each(lh, list) {
489                 struct dma_iso_ctx *ctx;
490                 ctx = list_entry(lh, struct dma_iso_ctx, link);
491                 if (ctx->type == type && ctx->channel == channel)
492                         return ctx;
493         }
494
495         return NULL;
496 }
497
498 void wakeup_dma_ir_ctx(unsigned long l)
499 {
500         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
501         int i;
502
503         spin_lock(&d->lock);
504
505         for (i = 0; i < d->num_desc; i++) {
506                 if (d->ir_prg[i][d->nb_cmd-1].status & cpu_to_le32(0xFFFF0000)) {
507                         reset_ir_status(d, i);
508                         d->buffer_status[i] = VIDEO1394_BUFFER_READY;
509                         do_gettimeofday(&d->buffer_time[i]);
510                 }
511         }
512
513         spin_unlock(&d->lock);
514
515         if (waitqueue_active(&d->waitq))
516                 wake_up_interruptible(&d->waitq);
517 }
518
519 static inline void put_timestamp(struct ti_ohci *ohci, struct dma_iso_ctx * d,
520                                  int n)
521 {
522         unsigned char* buf = d->dma.kvirt + n * d->buf_size;
523         u32 cycleTimer;
524         u32 timeStamp;
525
526         if (n == -1) {
527           return;
528         }
529
530         cycleTimer = reg_read(ohci, OHCI1394_IsochronousCycleTimer);
531
532         timeStamp = ((cycleTimer & 0x0fff) + d->syt_offset); /* 11059 = 450 us */
533         timeStamp = (timeStamp % 3072 + ((timeStamp / 3072) << 12)
534                 + (cycleTimer & 0xf000)) & 0xffff;
535         
536         buf[6] = timeStamp >> 8; 
537         buf[7] = timeStamp & 0xff; 
538
539     /* if first packet is empty packet, then put timestamp into the next full one too */
540     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
541             buf += d->packet_size;
542         buf[6] = timeStamp >> 8;
543             buf[7] = timeStamp & 0xff;
544         }
545
546     /* do the next buffer frame too in case of irq latency */
547         n = d->next_buffer[n];
548         if (n == -1) {
549           return;
550         }
551         buf = d->dma.kvirt + n * d->buf_size;
552
553         timeStamp += (d->last_used_cmd[n] << 12) & 0xffff;
554
555         buf[6] = timeStamp >> 8;
556         buf[7] = timeStamp & 0xff;
557
558     /* if first packet is empty packet, then put timestamp into the next full one too */
559     if ( (le32_to_cpu(d->it_prg[n][0].data[1]) >>16) == 0x008) {
560             buf += d->packet_size;
561         buf[6] = timeStamp >> 8;
562             buf[7] = timeStamp & 0xff;
563         }
564
565 #if 0
566         printk("curr: %d, next: %d, cycleTimer: %08x timeStamp: %08x\n",
567                curr, n, cycleTimer, timeStamp);
568 #endif  
569 }
570
571 void wakeup_dma_it_ctx(unsigned long l)
572 {
573         struct dma_iso_ctx *d = (struct dma_iso_ctx *) l;
574         struct ti_ohci *ohci = d->ohci;
575         int i;
576
577         spin_lock(&d->lock);
578
579         for (i = 0; i < d->num_desc; i++) {
580                 if (d->it_prg[i][d->last_used_cmd[i]].end.status & 
581                     cpu_to_le32(0xFFFF0000)) {
582                         int next = d->next_buffer[i];
583                         put_timestamp(ohci, d, next);
584                         d->it_prg[i][d->last_used_cmd[i]].end.status = 0;
585                         d->buffer_status[i] = VIDEO1394_BUFFER_READY;
586                 }
587         }
588
589         spin_unlock(&d->lock);
590
591         if (waitqueue_active(&d->waitq))
592                 wake_up_interruptible(&d->waitq);
593 }
594
595 static void initialize_dma_it_prg(struct dma_iso_ctx *d, int n, int sync_tag)
596 {
597         struct it_dma_prg *it_prg = d->it_prg[n];
598         struct dma_prog_region *it_reg = &d->prg_reg[n];
599         unsigned long buf = (unsigned long)d->dma.kvirt + n * d->buf_size;
600         int i;
601         d->last_used_cmd[n] = d->nb_cmd - 1;
602         for (i=0;i<d->nb_cmd;i++) {
603                                  
604                 it_prg[i].begin.control = cpu_to_le32(DMA_CTL_OUTPUT_MORE |
605                         DMA_CTL_IMMEDIATE | 8) ;
606                 it_prg[i].begin.address = 0;
607                 
608                 it_prg[i].begin.status = 0;
609                 
610                 it_prg[i].data[0] = cpu_to_le32(
611                         (IEEE1394_SPEED_100 << 16) 
612                         | (/* tag */ 1 << 14)
613                         | (d->channel << 8) 
614                         | (TCODE_ISO_DATA << 4));
615                 if (i==0) it_prg[i].data[0] |= cpu_to_le32(sync_tag);
616                 it_prg[i].data[1] = cpu_to_le32(d->packet_size << 16);
617                 it_prg[i].data[2] = 0;
618                 it_prg[i].data[3] = 0;
619                 
620                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST |
621                                              DMA_CTL_BRANCH);
622                 it_prg[i].end.address =
623                         cpu_to_le32(dma_region_offset_to_bus(&d->dma, (buf+i*d->packet_size) -
624                                                 (unsigned long)d->dma.kvirt));
625
626                 if (i<d->nb_cmd-1) {
627                         it_prg[i].end.control |= cpu_to_le32(d->packet_size);
628                         it_prg[i].begin.branchAddress = 
629                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
630                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
631                         it_prg[i].end.branchAddress = 
632                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
633                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
634                 } else {
635                         /* the last prg generates an interrupt */
636                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE | 
637                                 DMA_CTL_IRQ | d->left_size);
638                         /* the last prg doesn't branch */
639                         it_prg[i].begin.branchAddress = 0;
640                         it_prg[i].end.branchAddress = 0;
641                 }
642                 it_prg[i].end.status = 0;
643         }
644 }
645
646 static void initialize_dma_it_prg_var_packet_queue(
647         struct dma_iso_ctx *d, int n, unsigned int * packet_sizes,
648         struct ti_ohci *ohci)
649 {
650         struct it_dma_prg *it_prg = d->it_prg[n];
651         struct dma_prog_region *it_reg = &d->prg_reg[n];
652         int i;
653
654 #if 0
655         if (n != -1) {
656                 put_timestamp(ohci, d, n);
657         }
658 #endif
659         d->last_used_cmd[n] = d->nb_cmd - 1;
660
661         for (i = 0; i < d->nb_cmd; i++) {
662                 unsigned int size;
663                 if (packet_sizes[i] > d->packet_size) {
664                         size = d->packet_size;
665                 } else {
666                         size = packet_sizes[i];
667                 }
668                 it_prg[i].data[1] = cpu_to_le32(size << 16); 
669                 it_prg[i].end.control = cpu_to_le32(DMA_CTL_OUTPUT_LAST | DMA_CTL_BRANCH);
670
671                 if (i < d->nb_cmd-1 && packet_sizes[i+1] != 0) {
672                         it_prg[i].end.control |= cpu_to_le32(size);
673                         it_prg[i].begin.branchAddress =
674                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
675                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
676                         it_prg[i].end.branchAddress =
677                                 cpu_to_le32((dma_prog_region_offset_to_bus(it_reg, (i + 1) *
678                                         sizeof(struct it_dma_prg)) & 0xfffffff0) | 0x3);
679                 } else {
680                         /* the last prg generates an interrupt */
681                         it_prg[i].end.control |= cpu_to_le32(DMA_CTL_UPDATE | 
682                                 DMA_CTL_IRQ | size);
683                         /* the last prg doesn't branch */
684                         it_prg[i].begin.branchAddress = 0;
685                         it_prg[i].end.branchAddress = 0;
686                         d->last_used_cmd[n] = i;
687                         break;
688                 }
689         }
690 }
691
692 static void initialize_dma_it_ctx(struct dma_iso_ctx *d, int sync_tag,
693                                   unsigned int syt_offset, int flags)
694 {
695         struct ti_ohci *ohci = (struct ti_ohci *)d->ohci;
696         int i;
697
698         d->flags = flags;
699         d->syt_offset = (syt_offset == 0 ? 11000 : syt_offset);
700
701         ohci1394_stop_context(ohci, d->ctrlClear, NULL);
702
703         for (i=0;i<d->num_desc;i++)
704                 initialize_dma_it_prg(d, i, sync_tag);
705         
706         /* Set up isoRecvIntMask to generate interrupts */
707         reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1<<d->ctx);
708 }
709
710 static int video1394_ioctl(struct inode *inode, struct file *file,
711                            unsigned int cmd, unsigned long arg)
712 {
713         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
714         struct video_card *video = ctx->video;
715         struct ti_ohci *ohci = video->ohci;
716         unsigned long flags;
717
718         switch(cmd)
719         {
720         case VIDEO1394_LISTEN_CHANNEL:
721         case VIDEO1394_TALK_CHANNEL:
722         case VIDEO1394_IOC_LISTEN_CHANNEL:
723         case VIDEO1394_IOC_TALK_CHANNEL:
724         {
725                 struct video1394_mmap v;
726                 u64 mask;
727                 struct dma_iso_ctx *d;
728                 int i;
729
730                 if (copy_from_user(&v, (void *)arg, sizeof(v)))
731                         return -EFAULT;
732
733                 /* if channel < 0, find lowest available one */
734                 if (v.channel < 0) {
735                     mask = (u64)0x1;
736                     for (i=0; i<ISO_CHANNELS; i++) {
737                         if (!(ohci->ISO_channel_usage & mask)) {
738                             v.channel = i;
739                             PRINT(KERN_INFO, ohci->id, "Found free channel %d", i);
740                             break;
741                         }
742                         mask = mask << 1;
743                     }
744                 }
745                     
746                 if (v.channel<0 || v.channel>(ISO_CHANNELS-1)) {
747                         PRINT(KERN_ERR, ohci->id, 
748                               "Iso channel %d out of bounds", v.channel);
749                         return -EFAULT;
750                 }
751                 mask = (u64)0x1<<v.channel;
752                 printk("mask: %08X%08X usage: %08X%08X\n",
753                        (u32)(mask>>32),(u32)(mask&0xffffffff),
754                        (u32)(ohci->ISO_channel_usage>>32),
755                        (u32)(ohci->ISO_channel_usage&0xffffffff));
756                 if (ohci->ISO_channel_usage & mask) {
757                         PRINT(KERN_ERR, ohci->id, 
758                               "Channel %d is already taken", v.channel);
759                         return -EFAULT;
760                 }
761                 ohci->ISO_channel_usage |= mask;
762
763                 if (v.buf_size == 0 || v.buf_size > VIDEO1394_MAX_SIZE) {
764                         PRINT(KERN_ERR, ohci->id,
765                               "Invalid %d length buffer requested",v.buf_size);
766                         return -EFAULT;
767                 }
768
769                 if (v.nb_buffers == 0 || v.nb_buffers > VIDEO1394_MAX_SIZE) {
770                         PRINT(KERN_ERR, ohci->id,
771                               "Invalid %d buffers requested",v.nb_buffers);
772                         return -EFAULT;
773                 }
774
775                 if (v.nb_buffers * v.buf_size > VIDEO1394_MAX_SIZE) {
776                         PRINT(KERN_ERR, ohci->id, 
777                               "%d buffers of size %d bytes is too big", 
778                               v.nb_buffers, v.buf_size);
779                         return -EFAULT;
780                 }
781
782                 if (cmd == VIDEO1394_IOC_LISTEN_CHANNEL || cmd == VIDEO1394_LISTEN_CHANNEL) {
783                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_RECEIVE,
784                                               v.nb_buffers, v.buf_size, 
785                                               v.channel, 0);
786
787                         if (d == NULL) {
788                                 PRINT(KERN_ERR, ohci->id, 
789                                       "Couldn't allocate ir context");
790                                 return -EFAULT;
791                         }
792                         initialize_dma_ir_ctx(d, v.sync_tag, v.flags);
793
794                         ctx->current_ctx = d;
795
796                         v.buf_size = d->buf_size;
797                         list_add_tail(&d->link, &ctx->context_list);
798
799                         PRINT(KERN_INFO, ohci->id, 
800                               "iso context %d listen on channel %d",
801                               d->ctx, v.channel);
802                 }
803                 else {
804                         d = alloc_dma_iso_ctx(ohci, OHCI_ISO_TRANSMIT,
805                                               v.nb_buffers, v.buf_size, 
806                                               v.channel, v.packet_size);
807
808                         if (d == NULL) {
809                                 PRINT(KERN_ERR, ohci->id, 
810                                       "Couldn't allocate it context");
811                                 return -EFAULT;
812                         }
813                         initialize_dma_it_ctx(d, v.sync_tag, 
814                                               v.syt_offset, v.flags);
815
816                         ctx->current_ctx = d;
817
818                         v.buf_size = d->buf_size;
819
820                         list_add_tail(&d->link, &ctx->context_list);
821
822                         PRINT(KERN_INFO, ohci->id, 
823                               "Iso context %d talk on channel %d", d->ctx,
824                               v.channel);
825                 }
826
827                 if (copy_to_user((void *)arg, &v, sizeof(v)))
828                         return -EFAULT;
829
830                 return 0;
831         }
832         case VIDEO1394_UNLISTEN_CHANNEL:
833         case VIDEO1394_UNTALK_CHANNEL:
834         case VIDEO1394_IOC_UNLISTEN_CHANNEL: 
835         case VIDEO1394_IOC_UNTALK_CHANNEL:
836         {
837                 int channel;
838                 u64 mask;
839                 struct dma_iso_ctx *d;
840
841                 if (copy_from_user(&channel, (void *)arg, sizeof(int)))
842                         return -EFAULT;
843
844                 if (channel<0 || channel>(ISO_CHANNELS-1)) {
845                         PRINT(KERN_ERR, ohci->id, 
846                               "Iso channel %d out of bound", channel);
847                         return -EFAULT;
848                 }
849                 mask = (u64)0x1<<channel;
850                 if (!(ohci->ISO_channel_usage & mask)) {
851                         PRINT(KERN_ERR, ohci->id, 
852                               "Channel %d is not being used", channel);
853                         return -EFAULT;
854                 }
855
856                 /* Mark this channel as unused */
857                 ohci->ISO_channel_usage &= ~mask;
858
859                 if (cmd == VIDEO1394_IOC_UNLISTEN_CHANNEL || cmd == VIDEO1394_UNLISTEN_CHANNEL)
860                         d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, channel);
861                 else
862                         d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, channel);
863
864                 if (d == NULL) return -EFAULT;
865                 PRINT(KERN_INFO, ohci->id, "Iso context %d "
866                       "stop talking on channel %d", d->ctx, channel);
867                 free_dma_iso_ctx(d);
868                 
869                 return 0;
870         }
871         case VIDEO1394_LISTEN_QUEUE_BUFFER:
872         case VIDEO1394_IOC_LISTEN_QUEUE_BUFFER:
873         {
874                 struct video1394_wait v;
875                 struct dma_iso_ctx *d;
876
877                 if (copy_from_user(&v, (void *)arg, sizeof(v)))
878                         return -EFAULT;
879
880                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
881
882                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
883                         PRINT(KERN_ERR, ohci->id, 
884                               "Buffer %d out of range",v.buffer);
885                         return -EFAULT;
886                 }
887                 
888                 spin_lock_irqsave(&d->lock,flags);
889
890                 if (d->buffer_status[v.buffer]==VIDEO1394_BUFFER_QUEUED) {
891                         PRINT(KERN_ERR, ohci->id, 
892                               "Buffer %d is already used",v.buffer);
893                         spin_unlock_irqrestore(&d->lock,flags);
894                         return -EFAULT;
895                 }
896                 
897                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
898
899                 if (d->last_buffer>=0)
900                         d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress =
901                                 cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0)
902                                         & 0xfffffff0) | 0x1);
903
904                 d->last_buffer = v.buffer;
905
906                 d->ir_prg[d->last_buffer][d->nb_cmd-1].branchAddress = 0;
907
908                 spin_unlock_irqrestore(&d->lock,flags);
909
910                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000)) 
911                 {
912                         DBGMSG(ohci->id, "Starting iso DMA ctx=%d",d->ctx);
913
914                         /* Tell the controller where the first program is */
915                         reg_write(ohci, d->cmdPtr,
916                                 dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x1);
917
918                         /* Run IR context */
919                         reg_write(ohci, d->ctrlSet, 0x8000);
920                 }
921                 else {
922                         /* Wake up dma context if necessary */
923                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
924                                 PRINT(KERN_INFO, ohci->id, 
925                                       "Waking up iso dma ctx=%d", d->ctx);
926                                 reg_write(ohci, d->ctrlSet, 0x1000);
927                         }
928                 }
929                 return 0;
930                 
931         }
932         case VIDEO1394_LISTEN_WAIT_BUFFER:
933         case VIDEO1394_LISTEN_POLL_BUFFER:
934         case VIDEO1394_IOC_LISTEN_WAIT_BUFFER:
935         case VIDEO1394_IOC_LISTEN_POLL_BUFFER:
936         {
937                 struct video1394_wait v;
938                 struct dma_iso_ctx *d;
939                 int i;
940
941                 if (copy_from_user(&v, (void *)arg, sizeof(v)))
942                         return -EFAULT;
943
944                 d = find_ctx(&ctx->context_list, OHCI_ISO_RECEIVE, v.channel);
945
946                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
947                         PRINT(KERN_ERR, ohci->id, 
948                               "Buffer %d out of range",v.buffer);
949                         return -EFAULT;
950                 }
951
952                 /*
953                  * I change the way it works so that it returns 
954                  * the last received frame.
955                  */
956                 spin_lock_irqsave(&d->lock, flags);
957                 switch(d->buffer_status[v.buffer]) {
958                 case VIDEO1394_BUFFER_READY:
959                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
960                         break;
961                 case VIDEO1394_BUFFER_QUEUED:
962                         if (cmd == VIDEO1394_IOC_LISTEN_POLL_BUFFER ||
963                             cmd == VIDEO1394_LISTEN_POLL_BUFFER) {
964                             /* for polling, return error code EINTR */
965                             spin_unlock_irqrestore(&d->lock, flags);
966                             return -EINTR;
967                         }
968
969 #if 1
970                         while (d->buffer_status[v.buffer]!=
971                               VIDEO1394_BUFFER_READY) {
972                                 spin_unlock_irqrestore(&d->lock, flags);
973                                 interruptible_sleep_on(&d->waitq);
974                                 spin_lock_irqsave(&d->lock, flags);
975                                 if (signal_pending(current)) {
976                                         spin_unlock_irqrestore(&d->lock,flags);
977                                         return -EINTR;
978                                 }
979                         }
980 #else
981                         if (wait_event_interruptible(d->waitq, 
982                                                      d->buffer_status[v.buffer]
983                                                      == VIDEO1394_BUFFER_READY)
984                             == -ERESTARTSYS)
985                                 return -EINTR;
986 #endif
987                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
988                         break;
989                 default:
990                         PRINT(KERN_ERR, ohci->id, 
991                               "Buffer %d is not queued",v.buffer);
992                         spin_unlock_irqrestore(&d->lock, flags);
993                         return -EFAULT;
994                 }
995
996                 /* set time of buffer */
997                 v.filltime = d->buffer_time[v.buffer];
998 //              printk("Buffer %d time %d\n", v.buffer, (d->buffer_time[v.buffer]).tv_usec);
999
1000                 /*
1001                  * Look ahead to see how many more buffers have been received
1002                  */
1003                 i=0;
1004                 while (d->buffer_status[(v.buffer+1)%d->num_desc]==
1005                        VIDEO1394_BUFFER_READY) {
1006                         v.buffer=(v.buffer+1)%d->num_desc;
1007                         i++;
1008                 }
1009                 spin_unlock_irqrestore(&d->lock, flags);
1010
1011                 v.buffer=i;
1012                 if (copy_to_user((void *)arg, &v, sizeof(v)))
1013                         return -EFAULT;
1014
1015                 return 0;
1016         }
1017         case VIDEO1394_TALK_QUEUE_BUFFER:
1018         case VIDEO1394_IOC_TALK_QUEUE_BUFFER:
1019         {
1020                 struct video1394_wait v;
1021                 struct video1394_queue_variable qv;
1022                 struct dma_iso_ctx *d;
1023
1024                 qv.packet_sizes = NULL;
1025
1026                 if (copy_from_user(&v, (void *)arg, sizeof(v)))
1027                         return -EFAULT;
1028
1029                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1030
1031                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
1032                         PRINT(KERN_ERR, ohci->id, 
1033                               "Buffer %d out of range",v.buffer);
1034                         return -EFAULT;
1035                 }
1036                 
1037                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1038                         unsigned int *psizes;
1039                         int buf_size = d->nb_cmd * sizeof(unsigned int);
1040
1041                         if (copy_from_user(&qv, (void *)arg, sizeof(qv))) 
1042                                 return -EFAULT;
1043
1044                         psizes = kmalloc(buf_size, GFP_KERNEL);
1045                         if (!psizes)
1046                                 return -ENOMEM;
1047
1048                         if (copy_from_user(psizes, qv.packet_sizes, buf_size)) {
1049                                 kfree(psizes);
1050                                 return -EFAULT;
1051                         }
1052
1053                         qv.packet_sizes = psizes;
1054                 }
1055
1056                 spin_lock_irqsave(&d->lock,flags);
1057
1058                 if (d->buffer_status[v.buffer]!=VIDEO1394_BUFFER_FREE) {
1059                         PRINT(KERN_ERR, ohci->id, 
1060                               "Buffer %d is already used",v.buffer);
1061                         spin_unlock_irqrestore(&d->lock,flags);
1062                         if (qv.packet_sizes)
1063                                 kfree(qv.packet_sizes);
1064                         return -EFAULT;
1065                 }
1066                 
1067                 if (d->flags & VIDEO1394_VARIABLE_PACKET_SIZE) {
1068                         initialize_dma_it_prg_var_packet_queue(
1069                                 d, v.buffer, qv.packet_sizes,
1070                                 ohci);
1071                 }
1072
1073                 d->buffer_status[v.buffer]=VIDEO1394_BUFFER_QUEUED;
1074
1075                 if (d->last_buffer >= 0) {
1076                         d->it_prg[d->last_buffer]
1077                                 [ d->last_used_cmd[d->last_buffer] ].end.branchAddress = 
1078                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer],
1079                                                 0) & 0xfffffff0) | 0x3);
1080
1081                         d->it_prg[d->last_buffer]
1082                                 [ d->last_used_cmd[d->last_buffer] ].begin.branchAddress =
1083                                         cpu_to_le32((dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer],
1084                                                 0) & 0xfffffff0) | 0x3);
1085                         d->next_buffer[d->last_buffer] = v.buffer;
1086                 }
1087                 d->last_buffer = v.buffer;
1088                 d->next_buffer[d->last_buffer] = -1;
1089
1090                 d->it_prg[d->last_buffer][d->last_used_cmd[d->last_buffer]].end.branchAddress = 0;
1091
1092                 spin_unlock_irqrestore(&d->lock,flags);
1093
1094                 if (!(reg_read(ohci, d->ctrlSet) & 0x8000)) 
1095                 {
1096                         DBGMSG(ohci->id, "Starting iso transmit DMA ctx=%d",
1097                                d->ctx);
1098                         put_timestamp(ohci, d, d->last_buffer);
1099
1100                         /* Tell the controller where the first program is */
1101                         reg_write(ohci, d->cmdPtr,
1102                                 dma_prog_region_offset_to_bus(&d->prg_reg[v.buffer], 0) | 0x3);
1103
1104                         /* Run IT context */
1105                         reg_write(ohci, d->ctrlSet, 0x8000);
1106                 }
1107                 else {
1108                         /* Wake up dma context if necessary */
1109                         if (!(reg_read(ohci, d->ctrlSet) & 0x400)) {
1110                                 PRINT(KERN_INFO, ohci->id, 
1111                                       "Waking up iso transmit dma ctx=%d", 
1112                                       d->ctx);
1113                                 put_timestamp(ohci, d, d->last_buffer);
1114                                 reg_write(ohci, d->ctrlSet, 0x1000);
1115                         }
1116                 }
1117
1118                 if (qv.packet_sizes)
1119                         kfree(qv.packet_sizes);
1120
1121                 return 0;
1122                 
1123         }
1124         case VIDEO1394_TALK_WAIT_BUFFER:
1125         case VIDEO1394_IOC_TALK_WAIT_BUFFER:
1126         {
1127                 struct video1394_wait v;
1128                 struct dma_iso_ctx *d;
1129
1130                 if (copy_from_user(&v, (void *)arg, sizeof(v)))
1131                         return -EFAULT;
1132
1133                 d = find_ctx(&ctx->context_list, OHCI_ISO_TRANSMIT, v.channel);
1134
1135                 if ((v.buffer<0) || (v.buffer>d->num_desc)) {
1136                         PRINT(KERN_ERR, ohci->id, 
1137                               "Buffer %d out of range",v.buffer);
1138                         return -EFAULT;
1139                 }
1140
1141                 switch(d->buffer_status[v.buffer]) {
1142                 case VIDEO1394_BUFFER_READY:
1143                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1144                         return 0;
1145                 case VIDEO1394_BUFFER_QUEUED:
1146 #if 1
1147                         while (d->buffer_status[v.buffer]!=
1148                               VIDEO1394_BUFFER_READY) {
1149                                 interruptible_sleep_on(&d->waitq);
1150                                 if (signal_pending(current)) return -EINTR;
1151                         }
1152 #else
1153                         if (wait_event_interruptible(d->waitq, 
1154                                                      d->buffer_status[v.buffer]
1155                                                      == VIDEO1394_BUFFER_READY)
1156                             == -ERESTARTSYS)
1157                                 return -EINTR;
1158 #endif
1159                         d->buffer_status[v.buffer]=VIDEO1394_BUFFER_FREE;
1160                         return 0;
1161                 default:
1162                         PRINT(KERN_ERR, ohci->id, 
1163                               "Buffer %d is not queued",v.buffer);
1164                         return -EFAULT;
1165                 }
1166         }
1167         default:
1168                 return -EINVAL;
1169         }
1170 }
1171
1172 /*
1173  *      This maps the vmalloced and reserved buffer to user space.
1174  *
1175  *  FIXME: 
1176  *  - PAGE_READONLY should suffice!?
1177  *  - remap_page_range is kind of inefficient for page by page remapping.
1178  *    But e.g. pte_alloc() does not work in modules ... :-(
1179  */
1180
1181 int video1394_mmap(struct file *file, struct vm_area_struct *vma)
1182 {
1183         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1184         struct video_card *video = ctx->video;
1185         struct ti_ohci *ohci = video->ohci;
1186         int res = -EINVAL;
1187
1188         lock_kernel();
1189         ohci = video->ohci;
1190
1191         if (ctx->current_ctx == NULL) {
1192                 PRINT(KERN_ERR, ohci->id, "Current iso context not set");
1193         } else
1194                 res = dma_region_mmap(&ctx->current_ctx->dma, file, vma);
1195         unlock_kernel();
1196         return res;
1197 }
1198
1199 static int video1394_open(struct inode *inode, struct file *file)
1200 {
1201         int i = ieee1394_file_to_instance(file);
1202         struct video_card *video;
1203         struct file_ctx *ctx;
1204
1205         video = hpsb_get_hostinfo_bykey(&video1394_highlevel, i);
1206         if (video == NULL)
1207                 return -EIO;
1208
1209         ctx = kmalloc(sizeof(struct file_ctx), GFP_KERNEL);
1210         if (ctx == NULL)  {
1211                 PRINT(KERN_ERR, video->ohci->id, "Cannot malloc file_ctx");
1212                 return -ENOMEM;
1213         }
1214
1215         memset(ctx, 0, sizeof(struct file_ctx));
1216         ctx->video = video;
1217         INIT_LIST_HEAD(&ctx->context_list);
1218         ctx->current_ctx = NULL;
1219         file->private_data = ctx;
1220
1221         return 0;
1222 }
1223
1224 static int video1394_release(struct inode *inode, struct file *file)
1225 {
1226         struct file_ctx *ctx = (struct file_ctx *)file->private_data;
1227         struct video_card *video = ctx->video;
1228         struct ti_ohci *ohci = video->ohci;
1229         struct list_head *lh, *next;
1230         u64 mask;
1231
1232         lock_kernel();
1233         list_for_each_safe(lh, next, &ctx->context_list) {
1234                 struct dma_iso_ctx *d;
1235                 d = list_entry(lh, struct dma_iso_ctx, link);
1236                 mask = (u64) 1 << d->channel;
1237                 
1238                 if (!(ohci->ISO_channel_usage & mask))
1239                         PRINT(KERN_ERR, ohci->id, "On release: Channel %d "
1240                               "is not being used", d->channel);
1241                 else
1242                         ohci->ISO_channel_usage &= ~mask;
1243                 PRINT(KERN_INFO, ohci->id, "On release: Iso %s context "
1244                       "%d stop listening on channel %d",
1245                       d->type == OHCI_ISO_RECEIVE ? "receive" : "transmit",
1246                       d->ctx, d->channel);
1247                 free_dma_iso_ctx(d);
1248         }
1249
1250         kfree(ctx);
1251         file->private_data = NULL;
1252         
1253         unlock_kernel();
1254         return 0;
1255 }
1256
1257 static struct file_operations video1394_fops=
1258 {
1259         .owner =        THIS_MODULE,
1260         .ioctl =        video1394_ioctl,
1261         .mmap =         video1394_mmap,
1262         .open =         video1394_open,
1263         .release =      video1394_release
1264 };
1265
1266 /*** HOTPLUG STUFF **********************************************************/
1267 /*
1268  * Export information about protocols/devices supported by this driver.
1269  */
1270 static struct ieee1394_device_id video1394_id_table[] = {
1271         {
1272                 .match_flags    = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
1273                 .specifier_id   = CAMERA_UNIT_SPEC_ID_ENTRY & 0xffffff,
1274                 .version        = CAMERA_SW_VERSION_ENTRY & 0xffffff
1275         },
1276         { }
1277 };
1278
1279 MODULE_DEVICE_TABLE(ieee1394, video1394_id_table);
1280
1281 static struct hpsb_protocol_driver video1394_driver = {
1282         .name           = "1394 Digital Camera Driver",
1283         .id_table       = video1394_id_table,
1284 };
1285
1286
1287 static void video1394_add_host (struct hpsb_host *host)
1288 {
1289         struct ti_ohci *ohci;
1290         struct video_card *video;
1291         char name[16];
1292         int minor;
1293
1294         /* We only work with the OHCI-1394 driver */
1295         if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
1296                 return;
1297
1298         ohci = (struct ti_ohci *)host->hostdata;
1299
1300         video = hpsb_create_hostinfo(&video1394_highlevel, host, sizeof(*video));
1301         if (video == NULL) {
1302                 PRINT(KERN_ERR, ohci->id, "Cannot allocate video_card");
1303                 return;
1304         }
1305
1306         hpsb_set_hostinfo_key(&video1394_highlevel, host, ohci->id);
1307         video->ohci = ohci;
1308
1309         sprintf(name, "%d", ohci->id);
1310         minor = IEEE1394_MINOR_BLOCK_VIDEO1394 * 16 + ohci->id;
1311         video->devfs = devfs_register(devfs_handle, name,
1312                                       DEVFS_FL_AUTO_OWNER,
1313                                       IEEE1394_MAJOR, minor,
1314                                       S_IFCHR | S_IRUSR | S_IWUSR,
1315                                       &video1394_fops, NULL);
1316
1317         return;
1318 }
1319
1320
1321 static void video1394_remove_host (struct hpsb_host *host)
1322 {
1323         struct video_card *video = hpsb_get_hostinfo(&video1394_highlevel, host);
1324
1325         if (video)
1326                 devfs_unregister(video->devfs);
1327
1328         return;
1329 }
1330
1331
1332 static struct hpsb_highlevel video1394_highlevel = {
1333         .name =         VIDEO1394_DRIVER_NAME,
1334         .add_host =     video1394_add_host,
1335         .remove_host =  video1394_remove_host,
1336 };
1337
1338 MODULE_AUTHOR("Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>");
1339 MODULE_DESCRIPTION("driver for digital video on OHCI board");
1340 MODULE_SUPPORTED_DEVICE(VIDEO1394_DRIVER_NAME);
1341 MODULE_LICENSE("GPL");
1342
1343 static void __exit video1394_exit_module (void)
1344 {
1345         hpsb_unregister_protocol(&video1394_driver);
1346
1347         hpsb_unregister_highlevel(&video1394_highlevel);
1348
1349         devfs_unregister(devfs_handle);
1350         ieee1394_unregister_chardev(IEEE1394_MINOR_BLOCK_VIDEO1394);
1351         
1352         PRINT_G(KERN_INFO, "Removed " VIDEO1394_DRIVER_NAME " module");
1353 }
1354
1355 static int __init video1394_init_module (void)
1356 {
1357         if (ieee1394_register_chardev(IEEE1394_MINOR_BLOCK_VIDEO1394,
1358                                       THIS_MODULE, &video1394_fops)) {
1359                 PRINT_G(KERN_ERR, "video1394: unable to get minor device block");
1360                 return -EIO;
1361         }
1362         
1363         devfs_handle = devfs_mk_dir(NULL, VIDEO1394_DRIVER_NAME, NULL);
1364
1365         hpsb_register_highlevel(&video1394_highlevel);
1366
1367         hpsb_register_protocol(&video1394_driver);
1368
1369         PRINT_G(KERN_INFO, "Installed " VIDEO1394_DRIVER_NAME " module");
1370         return 0;
1371 }
1372
1373 module_init(video1394_init_module);
1374 module_exit(video1394_exit_module);