1 /* $Id: hfc_2bs0.c,v 1.1.4.1 2001/11/20 14:19:35 kai Exp $
3 * specific routines for CCD's HFC 2BS0
6 * Copyright by Karsten Keil <keil@isdn4linux.de>
8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference.
13 #define __NO_VERSION__
14 #include <linux/init.h>
19 #include <linux/interrupt.h>
22 WaitForBusy(struct IsdnCardState *cs)
30 while (!(cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) {
31 val = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2 |
32 (cs->hw.hfc.cip & 3));
38 printk(KERN_WARNING "HiSax: waitforBusy timeout\n");
45 WaitNoBusy(struct IsdnCardState *cs)
49 while ((cs->BC_Read_Reg(cs, HFC_STATUS, 0) & HFC_BUSY) && to) {
54 printk(KERN_WARNING "HiSax: waitforBusy timeout\n");
61 GetFreeFifoBytes(struct BCState *bcs)
65 if (bcs->hw.hfc.f1 == bcs->hw.hfc.f2)
66 return (bcs->cs->hw.hfc.fifosize);
67 s = bcs->hw.hfc.send[bcs->hw.hfc.f1] - bcs->hw.hfc.send[bcs->hw.hfc.f2];
69 s += bcs->cs->hw.hfc.fifosize;
70 s = bcs->cs->hw.hfc.fifosize - s;
75 ReadZReg(struct BCState *bcs, u_char reg)
80 val = 256 * bcs->cs->BC_Read_Reg(bcs->cs, HFC_DATA, reg | HFC_CIP | HFC_Z_HIGH);
82 val += bcs->cs->BC_Read_Reg(bcs->cs, HFC_DATA, reg | HFC_CIP | HFC_Z_LOW);
87 hfc_sched_event(struct BCState *bcs, int event)
89 bcs->event |= 1 << event;
90 queue_task(&bcs->tqueue, &tq_immediate);
91 mark_bh(IMMEDIATE_BH);
95 hfc_clear_fifo(struct BCState *bcs)
97 struct IsdnCardState *cs = bcs->cs;
103 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
104 debugl1(cs, "hfc_clear_fifo");
107 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
108 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
109 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
113 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
114 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
116 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
117 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
118 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
120 while (((f1 != f2) || (z1 != z2)) && cnt--) {
121 if (cs->debug & L1_DEB_HSCX)
122 debugl1(cs, "hfc clear %d f1(%d) f2(%d)",
123 bcs->channel, f1, f2);
126 rcnt += cs->hw.hfc.fifosize;
129 if (cs->debug & L1_DEB_HSCX)
130 debugl1(cs, "hfc clear %d z1(%x) z2(%x) cnt(%d)",
131 bcs->channel, z1, z2, rcnt);
132 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
134 while ((idx < rcnt) && WaitNoBusy(cs)) {
135 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
140 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
141 HFC_CHANNEL(bcs->channel));
144 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
146 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
147 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
149 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
150 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
151 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
153 restore_flags(flags);
158 static struct sk_buff
160 hfc_empty_fifo(struct BCState *bcs, int count)
164 struct IsdnCardState *cs = bcs->cs;
169 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
170 debugl1(cs, "hfc_empty_fifo");
172 if (count > HSCX_BUFMAX + 3) {
173 if (cs->debug & L1_DEB_WARN)
174 debugl1(cs, "hfc_empty_fifo: incoming packet too large");
175 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
176 while ((idx++ < count) && WaitNoBusy(cs))
177 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
179 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
180 HFC_CHANNEL(bcs->channel));
184 if ((count < 4) && (bcs->mode != L1_MODE_TRANS)) {
185 if (cs->debug & L1_DEB_WARN)
186 debugl1(cs, "hfc_empty_fifo: incoming packet too small");
187 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
188 while ((idx++ < count) && WaitNoBusy(cs))
189 cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
191 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
192 HFC_CHANNEL(bcs->channel));
194 #ifdef ERROR_STATISTIC
199 if (bcs->mode == L1_MODE_TRANS)
203 if (!(skb = dev_alloc_skb(count)))
204 printk(KERN_WARNING "HFC: receive out of memory\n");
206 ptr = skb_put(skb, count);
208 cip = HFC_CIP | HFC_FIFO_OUT | HFC_REC | HFC_CHANNEL(bcs->channel);
209 while ((idx < count) && WaitNoBusy(cs)) {
210 *ptr++ = cs->BC_Read_Reg(cs, HFC_DATA_NODEB, cip);
214 debugl1(cs, "RFIFO BUSY error");
215 printk(KERN_WARNING "HFC FIFO channel %d BUSY Error\n", bcs->channel);
216 dev_kfree_skb_any(skb);
217 if (bcs->mode != L1_MODE_TRANS) {
219 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
220 HFC_CHANNEL(bcs->channel));
225 if (bcs->mode != L1_MODE_TRANS) {
227 chksum = (cs->BC_Read_Reg(cs, HFC_DATA, cip) << 8);
229 chksum += cs->BC_Read_Reg(cs, HFC_DATA, cip);
231 stat = cs->BC_Read_Reg(cs, HFC_DATA, cip);
232 if (cs->debug & L1_DEB_HSCX)
233 debugl1(cs, "hfc_empty_fifo %d chksum %x stat %x",
234 bcs->channel, chksum, stat);
236 debugl1(cs, "FIFO CRC error");
237 dev_kfree_skb_any(skb);
239 #ifdef ERROR_STATISTIC
244 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
245 HFC_CHANNEL(bcs->channel));
253 hfc_fill_fifo(struct BCState *bcs)
255 struct IsdnCardState *cs = bcs->cs;
264 if (bcs->tx_skb->len <= 0)
269 cip = HFC_CIP | HFC_F1 | HFC_SEND | HFC_CHANNEL(bcs->channel);
270 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
271 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
275 if (bcs->mode != L1_MODE_TRANS) {
276 bcs->hw.hfc.f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
277 cip = HFC_CIP | HFC_F2 | HFC_SEND | HFC_CHANNEL(bcs->channel);
279 bcs->hw.hfc.f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
280 bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(bcs, HFC_Z1 | HFC_SEND | HFC_CHANNEL(bcs->channel));
281 if (cs->debug & L1_DEB_HSCX)
282 debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
283 bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
284 bcs->hw.hfc.send[bcs->hw.hfc.f1]);
285 fcnt = bcs->hw.hfc.f1 - bcs->hw.hfc.f2;
289 if (cs->debug & L1_DEB_HSCX)
290 debugl1(cs, "hfc_fill_fifo more as 30 frames");
291 restore_flags(flags);
294 count = GetFreeFifoBytes(bcs);
298 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
299 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
302 count += cs->hw.hfc.fifosize;
303 } /* L1_MODE_TRANS */
304 if (cs->debug & L1_DEB_HSCX)
305 debugl1(cs, "hfc_fill_fifo %d count(%ld/%d)",
306 bcs->channel, bcs->tx_skb->len,
308 if (count < bcs->tx_skb->len) {
309 if (cs->debug & L1_DEB_HSCX)
310 debugl1(cs, "hfc_fill_fifo no fifo mem");
311 restore_flags(flags);
314 cip = HFC_CIP | HFC_FIFO_IN | HFC_SEND | HFC_CHANNEL(bcs->channel);
316 while ((idx < bcs->tx_skb->len) && WaitNoBusy(cs))
317 cs->BC_Write_Reg(cs, HFC_DATA_NODEB, cip, bcs->tx_skb->data[idx++]);
318 if (idx != bcs->tx_skb->len) {
319 debugl1(cs, "FIFO Send BUSY error");
320 printk(KERN_WARNING "HFC S FIFO channel %d BUSY Error\n", bcs->channel);
322 count = bcs->tx_skb->len;
323 bcs->tx_cnt -= count;
324 if (PACKET_NOACK == bcs->tx_skb->pkt_type)
326 dev_kfree_skb_any(bcs->tx_skb);
328 if (bcs->mode != L1_MODE_TRANS) {
331 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F1_INC | HFC_SEND | HFC_CHANNEL(bcs->channel));
333 if (bcs->st->lli.l1writewakeup && (count >= 0))
334 bcs->st->lli.l1writewakeup(bcs->st, count);
335 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
337 restore_flags(flags);
342 main_irq_hfc(struct BCState *bcs)
345 struct IsdnCardState *cs = bcs->cs;
348 int receive, transmit, count = 5;
355 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
356 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
357 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
362 if (bcs->mode == L1_MODE_HDLC) {
363 f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
364 cip = HFC_CIP | HFC_F2 | HFC_REC | HFC_CHANNEL(bcs->channel);
366 f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
368 if (cs->debug & L1_DEB_HSCX)
369 debugl1(cs, "hfc rec %d f1(%d) f2(%d)",
370 bcs->channel, f1, f2);
374 if (receive || (bcs->mode == L1_MODE_TRANS)) {
376 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
377 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
380 rcnt += cs->hw.hfc.fifosize;
381 if ((bcs->mode == L1_MODE_HDLC) || (rcnt)) {
383 if (cs->debug & L1_DEB_HSCX)
384 debugl1(cs, "hfc rec %d z1(%x) z2(%x) cnt(%d)",
385 bcs->channel, z1, z2, rcnt);
387 if ((skb = hfc_empty_fifo(bcs, rcnt))) {
388 skb_queue_tail(&bcs->rqueue, skb);
389 hfc_sched_event(bcs, B_RCVBUFREADY);
394 restore_flags(flags);
399 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
401 if (test_bit(BC_FLG_BUSY, &bcs->Flag))
404 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
406 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
408 if (test_bit(BC_FLG_BUSY, &bcs->Flag))
412 hfc_sched_event(bcs, B_XMTBUFREADY);
415 restore_flags(flags);
416 if ((receive || transmit) && count)
422 mode_hfc(struct BCState *bcs, int mode, int bc)
424 struct IsdnCardState *cs = bcs->cs;
426 if (cs->debug & L1_DEB_HSCX)
427 debugl1(cs, "HFC 2BS0 mode %d bchan %d/%d",
428 mode, bc, bcs->channel);
435 cs->hw.hfc.ctmt &= ~1;
436 cs->hw.hfc.isac_spcr &= ~0x03;
439 cs->hw.hfc.ctmt &= ~2;
440 cs->hw.hfc.isac_spcr &= ~0x0c;
443 case (L1_MODE_TRANS):
444 cs->hw.hfc.ctmt &= ~(1 << bc); /* set HDLC mode */
445 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
446 hfc_clear_fifo(bcs); /* complete fifo clear */
448 cs->hw.hfc.ctmt |= 1;
449 cs->hw.hfc.isac_spcr &= ~0x03;
450 cs->hw.hfc.isac_spcr |= 0x02;
452 cs->hw.hfc.ctmt |= 2;
453 cs->hw.hfc.isac_spcr &= ~0x0c;
454 cs->hw.hfc.isac_spcr |= 0x08;
459 cs->hw.hfc.ctmt &= ~1;
460 cs->hw.hfc.isac_spcr &= ~0x03;
461 cs->hw.hfc.isac_spcr |= 0x02;
463 cs->hw.hfc.ctmt &= ~2;
464 cs->hw.hfc.isac_spcr &= ~0x0c;
465 cs->hw.hfc.isac_spcr |= 0x08;
469 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
470 cs->writeisac(cs, ISAC_SPCR, cs->hw.hfc.isac_spcr);
471 if (mode == L1_MODE_HDLC)
476 hfc_l2l1(struct PStack *st, int pr, void *arg)
478 struct sk_buff *skb = arg;
482 case (PH_DATA | REQUEST):
485 if (st->l1.bcs->tx_skb) {
486 skb_queue_tail(&st->l1.bcs->squeue, skb);
487 restore_flags(flags);
489 st->l1.bcs->tx_skb = skb;
490 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
491 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
492 restore_flags(flags);
495 case (PH_PULL | INDICATION):
496 if (st->l1.bcs->tx_skb) {
497 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
502 test_and_set_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
503 st->l1.bcs->tx_skb = skb;
504 st->l1.bcs->cs->BC_Send_Data(st->l1.bcs);
505 restore_flags(flags);
507 case (PH_PULL | REQUEST):
508 if (!st->l1.bcs->tx_skb) {
509 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
510 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
512 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
514 case (PH_ACTIVATE | REQUEST):
515 test_and_set_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
516 mode_hfc(st->l1.bcs, st->l1.mode, st->l1.bc);
517 l1_msg_b(st, pr, arg);
519 case (PH_DEACTIVATE | REQUEST):
520 l1_msg_b(st, pr, arg);
522 case (PH_DEACTIVATE | CONFIRM):
523 test_and_clear_bit(BC_FLG_ACTIV, &st->l1.bcs->Flag);
524 test_and_clear_bit(BC_FLG_BUSY, &st->l1.bcs->Flag);
525 mode_hfc(st->l1.bcs, 0, st->l1.bc);
526 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
533 close_hfcstate(struct BCState *bcs)
535 mode_hfc(bcs, 0, bcs->channel);
536 if (test_bit(BC_FLG_INIT, &bcs->Flag)) {
537 skb_queue_purge(&bcs->rqueue);
538 skb_queue_purge(&bcs->squeue);
540 dev_kfree_skb_any(bcs->tx_skb);
542 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
545 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
549 open_hfcstate(struct IsdnCardState *cs, struct BCState *bcs)
551 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
552 skb_queue_head_init(&bcs->rqueue);
553 skb_queue_head_init(&bcs->squeue);
556 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
563 setstack_hfc(struct PStack *st, struct BCState *bcs)
565 bcs->channel = st->l1.bc;
566 if (open_hfcstate(st->l1.hardware, bcs))
569 st->l2.l2l1 = hfc_l2l1;
570 setstack_manager(st);
577 init_send(struct BCState *bcs)
581 if (!(bcs->hw.hfc.send = kmalloc(32 * sizeof(unsigned int), GFP_ATOMIC))) {
583 "HiSax: No memory for hfc.send\n");
586 for (i = 0; i < 32; i++)
587 bcs->hw.hfc.send[i] = 0x1fff;
591 inithfc(struct IsdnCardState *cs)
593 init_send(&cs->bcs[0]);
594 init_send(&cs->bcs[1]);
595 cs->BC_Send_Data = &hfc_fill_fifo;
596 cs->bcs[0].BC_SetStack = setstack_hfc;
597 cs->bcs[1].BC_SetStack = setstack_hfc;
598 cs->bcs[0].BC_Close = close_hfcstate;
599 cs->bcs[1].BC_Close = close_hfcstate;
600 mode_hfc(cs->bcs, 0, 0);
601 mode_hfc(cs->bcs + 1, 0, 0);
605 releasehfc(struct IsdnCardState *cs)
607 if (cs->bcs[0].hw.hfc.send) {
608 kfree(cs->bcs[0].hw.hfc.send);
609 cs->bcs[0].hw.hfc.send = NULL;
611 if (cs->bcs[1].hw.hfc.send) {
612 kfree(cs->bcs[1].hw.hfc.send);
613 cs->bcs[1].hw.hfc.send = NULL;