2 * linux/include/asm-arm/arch-at91rm9200/hardware.h
4 * Copyright (c) 2003 SAN People
5 * Copyright (c) 2003 ATMEL
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
14 #ifndef __ASM_ARCH_HARDWARE_H
15 #define __ASM_ARCH_HARDWARE_H
17 #include <asm/sizes.h>
19 #include <asm/arch/AT91RM9200.h>
20 #include <asm/arch/AT91RM9200_SYS.h>
24 * The following variable is defined in arch/arm/mach-at91rm9200/core.c
25 * It is a pointer to the AT91RM9200 system peripherals.
27 extern AT91PS_SYS AT91_SYS;
32 * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF
33 * to 0xFEFA0000 .. 0xFF000000. (384Kb)
35 #define AT91C_IO_PHYS_BASE 0xFFFA0000
36 #define AT91C_IO_SIZE (0xFFFFFFFF - AT91C_IO_PHYS_BASE + 1)
37 #define AT91C_IO_VIRT_BASE (0xFF000000 - AT91C_IO_SIZE)
39 /* Convert a physical IO address to virtual IO address */
40 #define AT91_IO_P2V(x) ((x) - AT91C_IO_PHYS_BASE + AT91C_IO_VIRT_BASE)
43 * Virtual to Physical Address mapping for IO devices.
45 #define AT91C_VA_BASE_SYS AT91_IO_P2V(AT91C_BASE_SYS)
46 #define AT91C_VA_BASE_SPI AT91_IO_P2V(AT91C_BASE_SPI)
47 #define AT91C_VA_BASE_SSC2 AT91_IO_P2V(AT91C_BASE_SSC2)
48 #define AT91C_VA_BASE_SSC1 AT91_IO_P2V(AT91C_BASE_SSC1)
49 #define AT91C_VA_BASE_SSC0 AT91_IO_P2V(AT91C_BASE_SSC0)
50 #define AT91C_VA_BASE_US3 AT91_IO_P2V(AT91C_BASE_US3)
51 #define AT91C_VA_BASE_US2 AT91_IO_P2V(AT91C_BASE_US2)
52 #define AT91C_VA_BASE_US1 AT91_IO_P2V(AT91C_BASE_US1)
53 #define AT91C_VA_BASE_US0 AT91_IO_P2V(AT91C_BASE_US0)
54 #define AT91C_VA_BASE_EMAC AT91_IO_P2V(AT91C_BASE_EMAC)
55 #define AT91C_VA_BASE_TWI AT91_IO_P2V(AT91C_BASE_TWI)
56 #define AT91C_VA_BASE_MCI AT91_IO_P2V(AT91C_BASE_MCI)
57 #define AT91C_VA_BASE_UDP AT91_IO_P2V(AT91C_BASE_UDP)
58 #define AT91C_VA_BASE_TCB1 AT91_IO_P2V(AT91C_BASE_TCB1)
59 #define AT91C_VA_BASE_TCB0 AT91_IO_P2V(AT91C_BASE_TCB0)
62 #define AT91C_BASE_SRAM 0x00200000 /* Internal SRAM base address */
64 #define AT91C_NR_UART 5 /* 4 USART3's and one DBGU port */
66 /* Definition of interrupt priority levels */
67 #define AT91C_AIC_PRIOR_0 AT91C_AIC_PRIOR_LOWEST
68 #define AT91C_AIC_PRIOR_1 ((unsigned int) 0x1)
69 #define AT91C_AIC_PRIOR_2 ((unsigned int) 0x2)
70 #define AT91C_AIC_PRIOR_3 ((unsigned int) 0x3)
71 #define AT91C_AIC_PRIOR_4 ((unsigned int) 0x4)
72 #define AT91C_AIC_PRIOR_5 ((unsigned int) 0x5)
73 #define AT91C_AIC_PRIOR_6 ((unsigned int) 0x6)
74 #define AT91C_AIC_PRIOR_7 AT91C_AIC_PRIOR_HIGEST
78 * Implementation specific hardware definitions.
81 #ifdef CONFIG_ARCH_AT91RM9200DK
82 #include <asm/arch/at91rm9200dk.h>