original comment: +Wilson03172004,marked due to this pci host does not support MWI
[linux-2.4.git] / include / asm-arm / cache.h
1 /*
2  *  linux/include/asm-arm/cache.h
3  */
4 #ifndef __ASMARM_CACHE_H
5 #define __ASMARM_CACHE_H
6
7 #define        L1_CACHE_BYTES  32
8 #define        L1_CACHE_ALIGN(x)       (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
9 #define        SMP_CACHE_BYTES L1_CACHE_BYTES
10
11 #ifdef MODULE
12 #define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES)))
13 #else
14 #define __cacheline_aligned                                     \
15   __attribute__((__aligned__(L1_CACHE_BYTES),                   \
16                  __section__(".data.cacheline_aligned")))
17 #endif
18
19 #endif