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more debug output
[linux-2.4.git]
/
include
/
asm-cris
/
cache.h
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#ifndef _ASM_CACHE_H
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#define _ASM_CACHE_H
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/* Etrax 100LX have 32-byte cache-lines. When we add support for future chips
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* here should be a check for CPU type.
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*/
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#define L1_CACHE_BYTES 32
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#endif /* _ASM_CACHE_H */