include/asm-i386/mmu_context.h

   1 #ifndef __I386_MMU_CONTEXT_H
   2 #define __I386_MMU_CONTEXT_H
   3
   4 #include <linux/config.h>
   5 #include <asm/desc.h>
   6 #include <asm/atomic.h>
   7 #include <asm/pgalloc.h>
   8
   9 /*
  10  * hooks to add arch specific data into the mm struct.
  11  * Note that destroy_context is called even if init_new_context
  12  * fails.
  13  */
  14 int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
  15 void destroy_context(struct mm_struct *mm);
  16
  17 #ifdef CONFIG_SMP
  18
  19 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
  20 {
  21         if(cpu_tlbstate[cpu].state == TLBSTATE_OK)
  22                 cpu_tlbstate[cpu].state = TLBSTATE_LAZY;
  23 }
  24 #else
  25 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk, unsigned cpu)
  26 {
  27 }
  28 #endif
  29
  30 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk, unsigned cpu)
  31 {
  32         if (prev != next) {
  33                 /* stop flush ipis for the previous mm */
  34                 clear_bit(cpu, &prev->cpu_vm_mask);
  35 #ifdef CONFIG_SMP
  36                 cpu_tlbstate[cpu].state = TLBSTATE_OK;
  37                 cpu_tlbstate[cpu].active_mm = next;
  38 #endif
  39                 set_bit(cpu, &next->cpu_vm_mask);
  40                 /* Re-load page tables */
  41                 load_cr3(next->pgd);
  42                 /* load_LDT, if either the previous or next thread
  43                  * has a non-default LDT.
  44                  */
  45                 if (next->context.size+prev->context.size)
  46                         load_LDT(&next->context);
  47         }
  48 #ifdef CONFIG_SMP
  49         else {
  50                 cpu_tlbstate[cpu].state = TLBSTATE_OK;
  51                 if(cpu_tlbstate[cpu].active_mm != next)
  52                         out_of_line_bug();
  53                 if(!test_and_set_bit(cpu, &next->cpu_vm_mask)) {
  54                         /* We were in lazy tlb mode and leave_mm disabled
  55                          * tlb flush IPI delivery. We must reload %cr3.
  56                          */
  57                         load_cr3(next->pgd);
  58                         load_LDT(&next->context);
  59                 }
  60         }
  61 #endif
  62 }
  63
  64 #define activate_mm(prev, next) \
  65         switch_mm((prev),(next),NULL,smp_processor_id())
  66
  67 #endif