1 #ifndef __ASM_SOFTIRQ_H
2 #define __ASM_SOFTIRQ_H
4 #include <asm/atomic.h>
5 #include <asm/hardirq.h>
7 #define __cpu_bh_enable(cpu) \
8 do { barrier(); local_bh_count(cpu)--; } while (0)
9 #define cpu_bh_disable(cpu) \
10 do { local_bh_count(cpu)++; barrier(); } while (0)
12 #define local_bh_disable() cpu_bh_disable(smp_processor_id())
13 #define __local_bh_enable() __cpu_bh_enable(smp_processor_id())
15 #define in_softirq() (local_bh_count(smp_processor_id()) != 0)
18 * NOTE: this assembly code assumes:
20 * (char *)&local_bh_count - 8 == (char *)&softirq_pending
22 * If you change the offsets in irq_stat then you have to
23 * update this code as well.
25 #define local_bh_enable() \
27 unsigned int *ptr = &local_bh_count(smp_processor_id()); \
31 __asm__ __volatile__ ( \
36 LOCK_SECTION_START("") \
37 "2: pushl %%eax; pushl %%ecx; pushl %%edx;" \
39 "popl %%edx; popl %%ecx; popl %%eax;" \
44 : "r" (ptr), "i" (do_softirq) \
45 /* no registers clobbered */ ); \
48 #endif /* __ASM_SOFTIRQ_H */