1 #ifndef _PARISC_PGTABLE_H
2 #define _PARISC_PGTABLE_H
4 #include <asm/fixmap.h>
8 * we simulate an x86-style page table for the linux mm code
11 #include <linux/spinlock.h>
12 #include <asm/processor.h>
13 #include <asm/cache.h>
14 #include <asm/bitops.h>
16 #define ARCH_STACK_GROWSUP
19 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
20 * memory. For the return value to be meaningful, ADDR must be >=
21 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
22 * require a hash-, or multi-level tree-lookup or something of that
23 * sort) but it guarantees to return TRUE only if accessing the page
24 * at that address does not cause an error. Note that there may be
25 * addresses for which kern_addr_valid() returns FALSE even though an
26 * access would not cause an error (e.g., this is typically true for
27 * memory mapped I/O regions.
29 * XXX Need to implement this for parisc.
31 #define kern_addr_valid(addr) (1)
33 /* Certain architectures need to do special things when PTEs
34 * within a page table are directly modified. Thus, the following
35 * hook is made available.
37 #define set_pte(pteptr, pteval) \
39 *(pteptr) = (pteval); \
42 #endif /* !__ASSEMBLY__ */
44 #define pte_ERROR(e) \
45 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
46 #define pmd_ERROR(e) \
47 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
48 #define pgd_ERROR(e) \
49 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
51 /* Note: If you change ISTACK_SIZE, you need to change the corresponding
52 * values in vmlinux.lds and vmlinux64.lds (init_istack section). Also,
53 * the "order" and size need to agree.
56 #define ISTACK_SIZE 32768 /* Interrupt Stack Size */
57 #define ISTACK_ORDER 3
60 * NOTE: Many of the below macros use PT_NLEVELS because
61 * it is convenient that PT_NLEVELS == LOG2(pte size in bytes),
62 * i.e. we use 3 level page tables when we use 8 byte pte's
63 * (for 64 bit) and 2 level page tables when we use 4 byte pte's
68 #define PT_INITIAL 4 /* Number of initial page tables */
71 #define PT_INITIAL 2 /* Number of initial page tables */
74 #define MAX_ADDRBITS (PAGE_SHIFT + (PT_NLEVELS)*(PAGE_SHIFT - PT_NLEVELS))
75 #define MAX_ADDRESS (1UL << MAX_ADDRBITS)
77 #define SPACEID_SHIFT (MAX_ADDRBITS - 32)
79 /* Definitions for 1st level */
81 #define PGDIR_SHIFT (PAGE_SHIFT + (PT_NLEVELS - 1)*(PAGE_SHIFT - PT_NLEVELS))
82 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
83 #define PGDIR_MASK (~(PGDIR_SIZE-1))
84 #define PTRS_PER_PGD (1UL << (PAGE_SHIFT - PT_NLEVELS))
85 #define USER_PTRS_PER_PGD PTRS_PER_PGD
87 /* Definitions for 2nd level */
88 #define pgtable_cache_init() do { } while (0)
90 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT - PT_NLEVELS))
91 #define PMD_SIZE (1UL << PMD_SHIFT)
92 #define PMD_MASK (~(PMD_SIZE-1))
94 #define PTRS_PER_PMD (1UL << (PAGE_SHIFT - PT_NLEVELS))
96 #define PTRS_PER_PMD 1
99 /* Definitions for 3rd level */
101 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT - PT_NLEVELS))
104 * pgd entries used up by user/kernel:
107 #define FIRST_USER_PGD_NR 0
110 extern void *vmalloc_start;
111 #define PCXL_DMA_MAP_SIZE (8*1024*1024)
112 #define VMALLOC_START ((unsigned long)vmalloc_start)
113 #define VMALLOC_VMADDR(x) ((unsigned long)(x))
114 #define VMALLOC_END (FIXADDR_START)
117 /* NB: The tlb miss handlers make certain assumptions about the order */
118 /* of the following bits, so be careful (One example, bits 25-31 */
119 /* are moved together in one instruction). */
121 #define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
122 #define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
123 #define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
124 #define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
125 #define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
126 #define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
127 #define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
128 #define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
129 #define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
130 #define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
131 #define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
132 /* for cache flushing only */
133 #define _PAGE_USER_BIT 20 /* (0x800) Software: User accessable page */
135 /* N.B. The bits are defined in terms of a 32 bit word above, so the */
136 /* following macro is ok for both 32 and 64 bit. */
138 #define xlate_pabit(x) (31 - x)
140 #define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
141 #define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
142 #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
143 #define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
144 #define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
145 #define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
146 #define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
147 #define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
148 #define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
149 #define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
150 #define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
151 #define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
152 #define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
154 #define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
155 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
156 #define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
160 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
161 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
162 /* Others seem to make this executable, I don't know if that's correct
163 or not. The stack is mapped this way though so this is necessary
164 in the short term - dhd@linuxcare.com, 2000-08-08 */
165 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
166 #define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
167 #define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
168 #define PAGE_COPY PAGE_EXECREAD
169 #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
170 #define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
171 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_DIRTY | _PAGE_ACCESSED)
172 #define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
173 #define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
174 #define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
178 * We could have an execute only page using "gateway - promote to priv
179 * level 3", but that is kind of silly. So, the way things are defined
180 * now, we must always have read permission for pages with execute
181 * permission. For the fun of it we'll go ahead and support write only
186 #define __P000 PAGE_NONE
187 #define __P001 PAGE_READONLY
188 #define __P010 __P000 /* copy on write */
189 #define __P011 __P001 /* copy on write */
190 #define __P100 PAGE_EXECREAD
191 #define __P101 PAGE_EXECREAD
192 #define __P110 __P100 /* copy on write */
193 #define __P111 __P101 /* copy on write */
195 #define __S000 PAGE_NONE
196 #define __S001 PAGE_READONLY
197 #define __S010 PAGE_WRITEONLY
198 #define __S011 PAGE_SHARED
199 #define __S100 PAGE_EXECREAD
200 #define __S101 PAGE_EXECREAD
201 #define __S110 PAGE_RWX
202 #define __S111 PAGE_RWX
204 extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
206 /* initial page tables for 0-8MB for kernel */
208 extern unsigned long pg0[];
210 /* zero page used for uninitialized stuff */
212 extern unsigned long *empty_zero_page;
215 * ZERO_PAGE is a global shared page that is always zero: used
216 * for zero-mapped memory areas etc..
219 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
221 #define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
222 #define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
223 #define pte_clear(xp) do { pte_val(*(xp)) = 0; } while (0)
225 #define pmd_none(x) (!pmd_val(x))
226 #define pmd_bad(x) ((pmd_val(x) & ~PAGE_MASK) != _PAGE_TABLE)
227 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
228 #define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0)
233 #define pgd_page(pgd) ((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
235 /* For 64 bit we have three level tables */
237 #define pgd_none(x) (!pgd_val(x))
238 #define pgd_bad(x) ((pgd_val(x) & ~PAGE_MASK) != _PAGE_TABLE)
239 #define pgd_present(x) (pgd_val(x) & _PAGE_PRESENT)
240 #define pgd_clear(xp) do { pgd_val(*(xp)) = 0; } while (0)
243 * The "pgd_xxx()" functions here are trivial for a folded two-level
244 * setup: the pgd is never bad, and a pmd always exists (as it's folded
245 * into the pgd entry)
247 extern inline int pgd_none(pgd_t pgd) { return 0; }
248 extern inline int pgd_bad(pgd_t pgd) { return 0; }
249 extern inline int pgd_present(pgd_t pgd) { return 1; }
250 extern inline void pgd_clear(pgd_t * pgdp) { }
254 * The following only work if pte_present() is true.
255 * Undefined behaviour if not..
257 extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; }
258 extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
259 extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
260 extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
262 extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_READ; return pte; }
263 extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
264 extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
265 extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
266 extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_READ; return pte; }
267 extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
268 extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
269 extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
272 * Conversion functions: convert a page and protection to a page entry,
273 * and a page entry and page directory to the page they refer to.
275 #define __mk_pte(addr,pgprot) \
279 pte_val(__pte) = ((addr)+pgprot_val(pgprot)); \
285 * Change "struct page" to physical address.
287 #define page_to_phys(page) PAGE_TO_PA(page)
289 #ifdef CONFIG_DISCONTIGMEM
290 #define PAGE_TO_PA(page) \
291 ((((page)-(page)->zone->zone_mem_map) << PAGE_SHIFT) \
292 + ((page)->zone->zone_start_paddr))
294 #define PAGE_TO_PA(page) ((page - mem_map) << PAGE_SHIFT)
297 #define mk_pte(page, pgprot) \
301 pte_val(__pte) = ((unsigned long)(PAGE_TO_PA(page))) | \
302 pgprot_val(pgprot); \
307 /* This takes a physical page address that is used by the remapping functions */
308 #define mk_pte_phys(physpage, pgprot) \
309 ({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; })
311 extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
312 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
314 /* Permanent address of a page. On parisc we don't have highmem. */
316 #ifdef CONFIG_DISCONTIGMEM
317 #define pte_page(x) (phys_to_page(pte_val(x)))
319 #define pte_page(x) (mem_map+(pte_val(x) >> PAGE_SHIFT))
323 #define pmd_page(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
325 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
327 /* to find an entry in a page-table-directory */
328 #define pgd_offset(mm, address) \
329 ((mm)->pgd + ((address) >> PGDIR_SHIFT))
331 /* to find an entry in a kernel page-table-directory */
332 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
334 /* Find an entry in the second-level page table.. */
337 #define pmd_offset(dir,address) \
338 ((pmd_t *) pgd_page(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
340 #define pmd_offset(dir,addr) ((pmd_t *) dir)
343 /* Find an entry in the third-level page table.. */
344 #define pte_offset(pmd, address) \
345 ((pte_t *) pmd_page(*(pmd)) + (((address)>>PAGE_SHIFT) & (PTRS_PER_PTE-1)))
347 extern void paging_init (void);
349 /* Used for deferring calls to flush_dcache_page() */
351 #define PG_dcache_dirty PG_arch_1
353 struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
354 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
356 /* Encode and de-code a swap entry */
358 #define SWP_TYPE(x) ((x).val & 0x1f)
359 #define SWP_OFFSET(x) ( (((x).val >> 5) & 0xf) | \
360 (((x).val >> 7) & ~0xf) )
361 #define SWP_ENTRY(type, offset) ((swp_entry_t) { (type) | \
362 ((offset & 0xf) << 5) | \
363 ((offset & ~0xf) << 7) })
364 #define pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
365 #define swp_entry_to_pte(x) ((pte_t) { (x).val })
367 static inline int ptep_test_and_clear_young(pte_t *ptep)
370 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), ptep);
375 set_pte(ptep, pte_mkold(pte));
380 static inline int ptep_test_and_clear_dirty(pte_t *ptep)
383 return test_and_clear_bit(xlate_pabit(_PAGE_DIRTY_BIT), ptep);
388 set_pte(ptep, pte_mkclean(pte));
394 extern spinlock_t pa_dbit_lock;
396 static int pa_dbit_lock; /* dummy to keep the compilers happy */
399 static inline pte_t ptep_get_and_clear(pte_t *ptep)
404 spin_lock(&pa_dbit_lock);
405 pte = old_pte = *ptep;
406 pte_val(pte) &= ~_PAGE_PRESENT;
407 pte_val(pte) |= _PAGE_FLUSH;
409 spin_unlock(&pa_dbit_lock);
414 static inline void ptep_set_wrprotect(pte_t *ptep)
417 unsigned long new, old;
420 old = pte_val(*ptep);
421 new = pte_val(pte_wrprotect(__pte (old)));
422 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
424 pte_t old_pte = *ptep;
425 set_pte(ptep, pte_wrprotect(old_pte));
429 static inline void ptep_mkdirty(pte_t *ptep)
432 set_bit(xlate_pabit(_PAGE_DIRTY_BIT), ptep);
434 pte_t old_pte = *ptep;
435 set_pte(ptep, pte_mkdirty(old_pte));
439 #define pte_same(A,B) (pte_val(A) == pte_val(B))
442 #endif /* !__ASSEMBLY__ */
444 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
445 #define PageSkip(page) (0)
447 #define io_remap_page_range remap_page_range
449 /* We provide our own get_unmapped_area to provide cache coherency */
451 #define HAVE_ARCH_UNMAPPED_AREA
453 #endif /* _PARISC_PGTABLE_H */