5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
11 #include <linux/config.h>
13 #include <asm/byteorder.h>
14 #ifdef CONFIG_PPC_ISERIES
15 #include <asm/iSeries/iSeries_io.h>
17 #include <asm/memory.h>
18 #include <asm/delay.h>
20 #define SIO_CONFIG_RA 0x398
21 #define SIO_CONFIG_RD 0x399
24 /* Define this if you want to see virt_to_* messages */
27 extern unsigned long isa_io_base;
28 extern unsigned long isa_mem_base;
29 extern unsigned long pci_io_base;
30 extern unsigned long pci_dram_offset;
31 extern int have_print;
32 #define _IO_BASE isa_io_base
33 #define _ISA_MEM_BASE isa_mem_base
34 #define PCI_DRAM_OFFSET pci_dram_offset
36 #ifdef CONFIG_PPC_ISERIES
37 #define readb(addr) iSeries_Read_Byte((void*)(addr))
38 #define readw(addr) iSeries_Read_Word((void*)(addr))
39 #define readl(addr) iSeries_Read_Long((void*)(addr))
40 #define writeb(data, addr) iSeries_Write_Byte(data,((void*)(addr)))
41 #define writew(data, addr) iSeries_Write_Word(data,((void*)(addr)))
42 #define writel(data, addr) iSeries_Write_Long(data,((void*)(addr)))
43 #define memset_io(a,b,c) iSeries_memset_io((void *)(a),(b),(c))
44 #define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((void *)(a), (void *)(b), (c))
45 #define memcpy_toio(a,b,c) iSeries_memcpy_toio((void *)(a), (void *)(b), (c))
46 #define inb(addr) readb(((unsigned long)(addr)))
47 #define inw(addr) readw(((unsigned long)(addr)))
48 #define inl(addr) readl(((unsigned long)(addr)))
49 #define outb(data,addr) writeb(data,((unsigned long)(addr)))
50 #define outw(data,addr) writew(data,((unsigned long)(addr)))
51 #define outl(data,addr) writel(data,((unsigned long)(addr)))
53 #define readb(addr) eeh_readb((void*)(addr))
54 #define readw(addr) eeh_readw((void*)(addr))
55 #define readl(addr) eeh_readl((void*)(addr))
56 #define writeb(data, addr) eeh_writeb((data), ((void*)(addr)))
57 #define writew(data, addr) eeh_writew((data), ((void*)(addr)))
58 #define writel(data, addr) eeh_writel((data), ((void*)(addr)))
59 #define memset_io(a,b,c) eeh_memset_io((void *)(a),(b),(c))
60 #define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(void *)(b),(c))
61 #define memcpy_toio(a,b,c) eeh_memcpy_toio((void *)(a),(b),(c))
62 #define inb(port) eeh_inb((unsigned long)port)
63 #define outb(val, port) eeh_outb(val, (unsigned long)port)
64 #define inw(port) eeh_inw((unsigned long)port)
65 #define outw(val, port) eeh_outw(val, (unsigned long)port)
66 #define inl(port) eeh_inl((unsigned long)port)
67 #define outl(val, port) eeh_outl(val, (unsigned long)port)
70 * The __raw_read/write macros don't do byte-swapping.
71 * They are needed for some PCI devices such as the Matrox graphics
72 * adapter which is programmed to operate in big endian mode.
74 #define __raw_readb(addr) eeh_readb((void*)(addr))
75 #define __raw_readw(addr) eeh_raw_readw((void*)(addr))
76 #define __raw_readl(addr) eeh_raw_readl((void*)(addr))
77 #define __raw_writeb(data, addr) eeh_writeb((data), ((void*)(addr)))
78 #define __raw_writew(data, addr) eeh_raw_writew((data), ((void*)(addr)))
79 #define __raw_writel(data, addr) eeh_raw_writel((data), ((void*)(addr)))
82 * The insw/outsw/insl/outsl macros don't do byte-swapping.
83 * They are only used in practice for transferring buffers which
84 * are arrays of bytes, and byte-swapping is not appropriate in
85 * that case. - paulus */
86 #define insb(port, buf, ns) _insb((u8 *)((port)+pci_io_base), (buf), (ns))
87 #define outsb(port, buf, ns) _outsb((u8 *)((port)+pci_io_base), (buf), (ns))
88 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
89 #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
90 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
91 #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
94 extern void _insb(volatile u8 *port, void *buf, int ns);
95 extern void _outsb(volatile u8 *port, const void *buf, int ns);
96 extern void _insw(volatile u16 *port, void *buf, int ns);
97 extern void _outsw(volatile u16 *port, const void *buf, int ns);
98 extern void _insl(volatile u32 *port, void *buf, int nl);
99 extern void _outsl(volatile u32 *port, const void *buf, int nl);
100 extern void _insw_ns(volatile u16 *port, void *buf, int ns);
101 extern void _outsw_ns(volatile u16 *port, const void *buf, int ns);
102 extern void _insl_ns(volatile u32 *port, void *buf, int nl);
103 extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
106 * output pause versions need a delay at least for the
107 * w83c105 ide controller in a p610.
109 #define inb_p(port) inb(port)
110 #define outb_p(val, port) (udelay(1), outb((val), (port)))
111 #define inw_p(port) inw(port)
112 #define outw_p(val, port) (udelay(1), outw((val), (port)))
113 #define inl_p(port) inl(port)
114 #define outl_p(val, port) (udelay(1), outl((val), (port)))
117 * The *_ns versions below don't do byte-swapping.
118 * Neither do the standard versions now, these are just here
121 #define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
122 #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+pci_io_base), (buf), (ns))
123 #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
124 #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+pci_io_base), (buf), (nl))
127 #define IO_SPACE_LIMIT ~(0UL)
128 #define MEM_SPACE_LIMIT ~(0UL)
133 * Map in an area of physical address space, for accessing
136 extern void *__ioremap(unsigned long address, unsigned long size,
137 unsigned long flags);
138 extern void *ioremap(unsigned long address, unsigned long size);
139 #define ioremap_nocache(addr, size) ioremap((addr), (size))
140 extern void iounmap(void *addr);
143 * Change virtual addresses to physical addresses and vv, for
144 * addresses in the area where the kernel has the RAM mapped.
146 static inline unsigned long virt_to_phys(volatile void * address)
149 printk("virt_to_phys: 0x%08lx -> 0x%08lx\n",
150 (unsigned long) address,
151 __pa((unsigned long)address));
153 return __pa((unsigned long)address);
156 static inline void * phys_to_virt(unsigned long address)
159 printk("phys_to_virt: 0x%08lx -> 0x%08lx\n", address, __va(address));
161 return (void *) __va(address);
165 * Change "struct page" to physical address.
167 #define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT)
170 #endif /* __KERNEL__ */
172 static inline void iosync(void)
174 __asm__ __volatile__ ("sync" : : : "memory");
177 /* Enforce in-order execution of data I/O.
178 * No distinction between read/write on PPC; use eieio for all three.
180 #define iobarrier_rw() eieio()
181 #define iobarrier_r() eieio()
182 #define iobarrier_w() eieio()
185 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
186 * Until we can validate all required device drivers are weakc safe, an
187 * excess of syncs before the MMIO operations will make things work. On
188 * sstar, sync time is << than mmio time, so this should not be a big impact.
190 static inline int in_8(volatile unsigned char *addr)
194 __asm__ __volatile__("sync; lbz%U1%X1 %0,%1; sync" : "=r" (ret) : "m" (*addr));
198 static inline void out_8(volatile unsigned char *addr, int val)
200 __asm__ __volatile__("sync; stb%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
203 static inline int in_le16(volatile unsigned short *addr)
207 __asm__ __volatile__("sync; lhbrx %0,0,%1; sync" : "=r" (ret) :
208 "r" (addr), "m" (*addr));
212 static inline int in_be16(volatile unsigned short *addr)
216 __asm__ __volatile__("sync; lhz%U1%X1 %0,%1; sync" : "=r" (ret) : "m" (*addr));
220 static inline void out_le16(volatile unsigned short *addr, int val)
222 __asm__ __volatile__("sync; sthbrx %1,0,%2; sync" : "=m" (*addr) :
223 "r" (val), "r" (addr));
226 static inline void out_be16(volatile unsigned short *addr, int val)
228 __asm__ __volatile__("sync; sth%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
231 static inline unsigned in_le32(volatile unsigned *addr)
235 __asm__ __volatile__("sync; lwbrx %0,0,%1; sync" : "=r" (ret) :
236 "r" (addr), "m" (*addr));
240 static inline unsigned in_be32(volatile unsigned *addr)
244 __asm__ __volatile__("sync; lwz%U1%X1 %0,%1; sync" : "=r" (ret) : "m" (*addr));
248 static inline void out_le32(volatile unsigned *addr, int val)
250 __asm__ __volatile__("sync; stwbrx %1,0,%2; sync" : "=m" (*addr) :
251 "r" (val), "r" (addr));
254 static inline void out_be32(volatile unsigned *addr, int val)
256 __asm__ __volatile__("sync; stw%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
259 #ifndef CONFIG_PPC_ISERIES
264 static inline int check_signature(unsigned long io_addr,
265 const unsigned char *signature, int length)
268 #ifndef CONFIG_PPC_ISERIES
270 if (readb(io_addr) != *signature)
284 #define dma_cache_inv(_start,_size) do { } while (0)
285 #define dma_cache_wback(_start,_size) do { } while (0)
286 #define dma_cache_wback_inv(_start,_size) do { } while (0)
288 #endif /* __KERNEL__ */
290 #endif /* _PPC64_IO_H */