6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #include <asm/atomic.h>
14 extern void disable_irq(unsigned int);
15 extern void disable_irq_nosync(unsigned int);
16 extern void enable_irq(unsigned int);
18 /* Need to keep at 256 (minimum) for iSeries */
21 #define MAX_IRQS (1<<24)
23 extern unsigned int _next_irq(unsigned int irq);
25 /* Define a way to iterate across irqs fairly efficiently. */
26 #define for_each_irq(i) \
27 for ((i) = 0; (i) < MAX_IRQS; (i) = _next_irq(i))
30 extern void *_irqdesc(unsigned int irq);
31 extern void *_real_irqdesc(unsigned int irq);
32 #define irqdesc(irq) ((irq_desc_t *)_irqdesc(irq))
33 #define real_irqdesc(irq) ((irq_desc_t *)_real_irqdesc(irq))
36 * This gets called from serial.c, which is now used on
37 * powermacs as well as prep/chrp boxes.
38 * Prep and chrp both have cascaded 8259 PICs.
40 static __inline__ int irq_cannonicalize(int irq)
46 * Because many systems have two overlapping names spaces for
47 * interrupts (ISA and XICS for example), and the ISA interrupts
48 * have historically not been easy to renumber, we allow ISA
49 * interrupts to take values 0 - 15, and shift up the remaining
52 * This would be nice to remove at some point as it adds confusion
53 * and adds a nasty end case if any platform native interrupts have
54 * values within 0x10 of the end of that namespace.
57 #define NUM_ISA_INTERRUPTS 0x10
59 extern inline int irq_offset_up(int irq)
61 return(irq + NUM_ISA_INTERRUPTS);
64 extern inline int irq_offset_down(int irq)
66 return(irq - NUM_ISA_INTERRUPTS);
69 extern inline int irq_offset_value(void)
71 return NUM_ISA_INTERRUPTS;
74 #endif /* _ASM_IRQ_H */
75 #endif /* __KERNEL__ */