2 * include/asm-s390/bitops.h
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
8 * Derived from "include/asm-i386/bitops.h"
9 * Copyright (C) 1992, Linus Torvalds
13 #ifndef _S390_BITOPS_H
14 #define _S390_BITOPS_H
17 * bit 0 is the LSB of *addr; bit 63 is the MSB of *addr;
18 * bit 64 is the LSB of *(addr+8). That combined with the
19 * big endian byte order on S390 give the following bit
21 * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30
22 * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20
23 * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10
24 * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00
25 * after that follows the next long with bit numbers
26 * 7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70
27 * 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60
28 * 5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50
29 * 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40
30 * The reason for this bit ordering is the fact that
31 * in the architecture independent code bits operations
32 * of the form "flags |= (1 << bitnr)" are used INTERMIXED
33 * with operation of the form "set_bit(bitnr, flags)".
35 #include <linux/config.h>
37 /* set ALIGN_CS to 1 if the SMP safe bit operations should
38 * align the address to 4 byte boundary. It seems to work
39 * without the alignment.
46 #error "bitops won't work without CONFIG_SMP"
50 /* bitmap tables from arch/S390/kernel/bitmap.S */
51 extern const char _oi_bitmap[];
52 extern const char _ni_bitmap[];
53 extern const char _zb_findmap[];
57 * SMP save set_bit routine based on compare and swap (CS)
59 static __inline__ void set_bit_cs(unsigned long nr, volatile void * addr)
61 unsigned long bits, mask;
64 " lghi %2,7\n" /* CS must be aligned on 4 byte b. */
65 " ngr %2,%1\n" /* isolate last 2 bits of address */
66 " xgr %1,%2\n" /* make addr % 4 == 0 */
68 " agr %0,%2\n" /* add alignement to bitnr */
71 " nr %2,%0\n" /* make shift value */
75 " la %1,0(%0,%1)\n" /* calc. address for CS */
76 " sllg %3,%3,0(%2)\n" /* make OR mask */
78 "0: lgr %2,%0\n" /* CS loop starts here */
79 " ogr %2,%3\n" /* set bit */
82 : "+a" (nr), "+a" (addr), "=&a" (bits), "=&d" (mask) :
87 * SMP save clear_bit routine based on compare and swap (CS)
89 static __inline__ void clear_bit_cs(unsigned long nr, volatile void * addr)
91 unsigned long bits, mask;
94 " lghi %2,7\n" /* CS must be aligned on 4 byte b. */
95 " ngr %2,%1\n" /* isolate last 2 bits of address */
96 " xgr %1,%2\n" /* make addr % 4 == 0 */
98 " agr %0,%2\n" /* add alignement to bitnr */
101 " nr %2,%0\n" /* make shift value */
105 " la %1,0(%0,%1)\n" /* calc. address for CS */
107 " rllg %3,%3,0(%2)\n" /* make AND mask */
109 "0: lgr %2,%0\n" /* CS loop starts here */
110 " ngr %2,%3\n" /* clear bit */
113 : "+a" (nr), "+a" (addr), "=&a" (bits), "=&d" (mask) :
118 * SMP save change_bit routine based on compare and swap (CS)
120 static __inline__ void change_bit_cs(unsigned long nr, volatile void * addr)
122 unsigned long bits, mask;
123 __asm__ __volatile__(
125 " lghi %2,7\n" /* CS must be aligned on 4 byte b. */
126 " ngr %2,%1\n" /* isolate last 2 bits of address */
127 " xgr %1,%2\n" /* make addr % 4 == 0 */
129 " agr %0,%2\n" /* add alignement to bitnr */
132 " nr %2,%0\n" /* make shift value */
136 " la %1,0(%0,%1)\n" /* calc. address for CS */
137 " sllg %3,%3,0(%2)\n" /* make XR mask */
139 "0: lgr %2,%0\n" /* CS loop starts here */
140 " xgr %2,%3\n" /* change bit */
143 : "+a" (nr), "+a" (addr), "=&a" (bits), "=&d" (mask) :
148 * SMP save test_and_set_bit routine based on compare and swap (CS)
150 static __inline__ int
151 test_and_set_bit_cs(unsigned long nr, volatile void * addr)
153 unsigned long bits, mask;
154 __asm__ __volatile__(
156 " lghi %2,7\n" /* CS must be aligned on 4 byte b. */
157 " ngr %2,%1\n" /* isolate last 2 bits of address */
158 " xgr %1,%2\n" /* make addr % 4 == 0 */
160 " agr %0,%2\n" /* add alignement to bitnr */
163 " nr %2,%0\n" /* make shift value */
167 " la %1,0(%0,%1)\n" /* calc. address for CS */
168 " sllg %3,%3,0(%2)\n" /* make OR mask */
170 "0: lgr %2,%0\n" /* CS loop starts here */
171 " ogr %2,%3\n" /* set bit */
174 " ngr %0,%3\n" /* isolate old bit */
175 : "+a" (nr), "+a" (addr), "=&a" (bits), "=&d" (mask) :
181 * SMP save test_and_clear_bit routine based on compare and swap (CS)
183 static __inline__ int
184 test_and_clear_bit_cs(unsigned long nr, volatile void * addr)
186 unsigned long bits, mask;
187 __asm__ __volatile__(
189 " lghi %2,7\n" /* CS must be aligned on 4 byte b. */
190 " ngr %2,%1\n" /* isolate last 2 bits of address */
191 " xgr %1,%2\n" /* make addr % 4 == 0 */
193 " agr %0,%2\n" /* add alignement to bitnr */
196 " nr %2,%0\n" /* make shift value */
200 " la %1,0(%0,%1)\n" /* calc. address for CS */
201 " rllg %3,%3,0(%2)\n" /* make AND mask */
203 "0: lgr %2,%0\n" /* CS loop starts here */
204 " ngr %2,%3\n" /* clear bit */
207 " xgr %0,%2\n" /* isolate old bit */
208 : "+a" (nr), "+a" (addr), "=&a" (bits), "=&d" (mask) :
214 * SMP save test_and_change_bit routine based on compare and swap (CS)
216 static __inline__ int
217 test_and_change_bit_cs(unsigned long nr, volatile void * addr)
219 unsigned long bits, mask;
220 __asm__ __volatile__(
222 " lghi %2,7\n" /* CS must be aligned on 4 byte b. */
223 " ngr %2,%1\n" /* isolate last 2 bits of address */
224 " xgr %1,%2\n" /* make addr % 4 == 0 */
226 " agr %0,%2\n" /* add alignement to bitnr */
229 " nr %2,%0\n" /* make shift value */
233 " la %1,0(%0,%1)\n" /* calc. address for CS */
234 " sllg %3,%3,0(%2)\n" /* make OR mask */
236 "0: lgr %2,%0\n" /* CS loop starts here */
237 " xgr %2,%3\n" /* change bit */
240 " ngr %0,%3\n" /* isolate old bit */
241 : "+a" (nr), "+a" (addr), "=&a" (bits), "=&d" (mask) :
245 #endif /* CONFIG_SMP */
248 * fast, non-SMP set_bit routine
250 static __inline__ void __set_bit(unsigned long nr, volatile void * addr)
252 unsigned long reg1, reg2;
253 __asm__ __volatile__(
262 : "=&a" (reg1), "=&a" (reg2)
263 : "a" (nr), "a" (addr), "a" (&_oi_bitmap) : "cc", "memory" );
266 static __inline__ void
267 __constant_set_bit(const unsigned long nr, volatile void * addr)
271 __asm__ __volatile__ ("la 1,%0\n\t"
273 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
274 : : "1", "cc", "memory");
277 __asm__ __volatile__ ("la 1,%0\n\t"
279 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
280 : : "1", "cc", "memory" );
283 __asm__ __volatile__ ("la 1,%0\n\t"
285 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
286 : : "1", "cc", "memory" );
289 __asm__ __volatile__ ("la 1,%0\n\t"
291 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
292 : : "1", "cc", "memory" );
295 __asm__ __volatile__ ("la 1,%0\n\t"
297 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
298 : : "1", "cc", "memory" );
301 __asm__ __volatile__ ("la 1,%0\n\t"
303 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
304 : : "1", "cc", "memory" );
307 __asm__ __volatile__ ("la 1,%0\n\t"
309 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
310 : : "1", "cc", "memory" );
313 __asm__ __volatile__ ("la 1,%0\n\t"
315 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
316 : : "1", "cc", "memory" );
321 #define set_bit_simple(nr,addr) \
322 (__builtin_constant_p((nr)) ? \
323 __constant_set_bit((nr),(addr)) : \
324 __set_bit((nr),(addr)) )
327 * fast, non-SMP clear_bit routine
329 static __inline__ void
330 __clear_bit(unsigned long nr, volatile void * addr)
332 unsigned long reg1, reg2;
333 __asm__ __volatile__(
342 : "=&a" (reg1), "=&a" (reg2)
343 : "d" (nr), "a" (addr), "a" (&_ni_bitmap) : "cc", "memory" );
346 static __inline__ void
347 __constant_clear_bit(const unsigned long nr, volatile void * addr)
351 __asm__ __volatile__ ("la 1,%0\n\t"
353 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
354 : : "1", "cc", "memory" );
357 __asm__ __volatile__ ("la 1,%0\n\t"
359 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
360 : : "1", "cc", "memory" );
363 __asm__ __volatile__ ("la 1,%0\n\t"
365 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
366 : : "1", "cc", "memory" );
369 __asm__ __volatile__ ("la 1,%0\n\t"
371 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
372 : : "1", "cc", "memory" );
375 __asm__ __volatile__ ("la 1,%0\n\t"
377 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
378 : : "cc", "memory" );
381 __asm__ __volatile__ ("la 1,%0\n\t"
383 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
384 : : "1", "cc", "memory" );
387 __asm__ __volatile__ ("la 1,%0\n\t"
389 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
390 : : "1", "cc", "memory" );
393 __asm__ __volatile__ ("la 1,%0\n\t"
395 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
396 : : "1", "cc", "memory" );
401 #define clear_bit_simple(nr,addr) \
402 (__builtin_constant_p((nr)) ? \
403 __constant_clear_bit((nr),(addr)) : \
404 __clear_bit((nr),(addr)) )
407 * fast, non-SMP change_bit routine
409 static __inline__ void __change_bit(unsigned long nr, volatile void * addr)
411 unsigned long reg1, reg2;
412 __asm__ __volatile__(
421 : "=&a" (reg1), "=&a" (reg2)
422 : "d" (nr), "a" (addr), "a" (&_oi_bitmap) : "cc", "memory" );
425 static __inline__ void
426 __constant_change_bit(const unsigned long nr, volatile void * addr)
430 __asm__ __volatile__ ("la 1,%0\n\t"
432 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
433 : : "cc", "memory" );
436 __asm__ __volatile__ ("la 1,%0\n\t"
438 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
439 : : "cc", "memory" );
442 __asm__ __volatile__ ("la 1,%0\n\t"
444 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
445 : : "cc", "memory" );
448 __asm__ __volatile__ ("la 1,%0\n\t"
450 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
451 : : "cc", "memory" );
454 __asm__ __volatile__ ("la 1,%0\n\t"
456 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
457 : : "cc", "memory" );
460 __asm__ __volatile__ ("la 1,%0\n\t"
462 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
463 : : "1", "cc", "memory" );
466 __asm__ __volatile__ ("la 1,%0\n\t"
468 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
469 : : "1", "cc", "memory" );
472 __asm__ __volatile__ ("la 1,%0\n\t"
474 : "=m" (*((volatile char *) addr + ((nr>>3)^7)))
475 : : "1", "cc", "memory" );
480 #define change_bit_simple(nr,addr) \
481 (__builtin_constant_p((nr)) ? \
482 __constant_change_bit((nr),(addr)) : \
483 __change_bit((nr),(addr)) )
486 * fast, non-SMP test_and_set_bit routine
488 static __inline__ int
489 test_and_set_bit_simple(unsigned long nr, volatile void * addr)
491 unsigned long reg1, reg2;
493 __asm__ __volatile__(
504 : "=&d" (oldbit), "=&a" (reg1), "=&a" (reg2)
505 : "d" (nr), "a" (addr), "a" (&_oi_bitmap) : "cc", "memory" );
508 #define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y)
511 * fast, non-SMP test_and_clear_bit routine
513 static __inline__ int
514 test_and_clear_bit_simple(unsigned long nr, volatile void * addr)
516 unsigned long reg1, reg2;
519 __asm__ __volatile__(
530 : "=&d" (oldbit), "=&a" (reg1), "=&a" (reg2)
531 : "d" (nr), "a" (addr), "a" (&_ni_bitmap) : "cc", "memory" );
534 #define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y)
537 * fast, non-SMP test_and_change_bit routine
539 static __inline__ int
540 test_and_change_bit_simple(unsigned long nr, volatile void * addr)
542 unsigned long reg1, reg2;
545 __asm__ __volatile__(
556 : "=&d" (oldbit), "=&a" (reg1), "=&a" (reg2)
557 : "d" (nr), "a" (addr), "a" (&_oi_bitmap) : "cc", "memory" );
560 #define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y)
563 #define set_bit set_bit_cs
564 #define clear_bit clear_bit_cs
565 #define change_bit change_bit_cs
566 #define test_and_set_bit test_and_set_bit_cs
567 #define test_and_clear_bit test_and_clear_bit_cs
568 #define test_and_change_bit test_and_change_bit_cs
570 #define set_bit set_bit_simple
571 #define clear_bit clear_bit_simple
572 #define change_bit change_bit_simple
573 #define test_and_set_bit test_and_set_bit_simple
574 #define test_and_clear_bit test_and_clear_bit_simple
575 #define test_and_change_bit test_and_change_bit_simple
580 * This routine doesn't need to be atomic.
583 static __inline__ int __test_bit(unsigned long nr, volatile void * addr)
585 unsigned long reg1, reg2;
588 __asm__ __volatile__(
596 : "=&d" (oldbit), "=&a" (reg1), "=&a" (reg2)
597 : "d" (nr), "a" (addr) : "cc" );
601 static __inline__ int
602 __constant_test_bit(unsigned long nr, volatile void * addr) {
603 return (((volatile char *) addr)[(nr>>3)^7] & (1<<(nr&7))) != 0;
606 #define test_bit(nr,addr) \
607 (__builtin_constant_p((nr)) ? \
608 __constant_test_bit((nr),(addr)) : \
609 __test_bit((nr),(addr)) )
612 * Find-bit routines..
614 static __inline__ unsigned long
615 find_first_zero_bit(void * addr, unsigned long size)
617 unsigned long res, cmp, count;
621 __asm__(" lghi %1,-1\n"
626 "0: cg %1,0(%0,%4)\n"
632 "1: lg %2,0(%0,%4)\n"
643 "3: tmll %2,0x00ff\n"
651 : "=&a" (res), "=&d" (cmp), "=&a" (count)
652 : "a" (size), "a" (addr), "a" (&_zb_findmap) : "cc" );
653 return (res < size) ? res : size;
656 static __inline__ unsigned long
657 find_next_zero_bit (void * addr, unsigned long size, unsigned long offset)
659 unsigned long * p = ((unsigned long *) addr) + (offset >> 6);
660 unsigned long bitvec, reg;
661 unsigned long set, bit = offset & 63, res;
665 * Look for zero in first word
667 bitvec = (*p) >> bit;
668 __asm__(" lhi %2,-1\n"
679 "1: tmll %1,0x00ff\n"
686 : "=&d" (set), "+a" (bitvec), "=&d" (reg)
687 : "a" (&_zb_findmap) : "cc" );
688 if (set < (64 - bit))
694 * No zero yet, search remaining full words for a zero
696 res = find_first_zero_bit (p, size - 64 * (p - (unsigned long *) addr));
697 return (offset + res);
701 * ffz = Find First Zero in word. Undefined if no zero exists,
702 * so code should check against ~0UL first..
704 static __inline__ unsigned long ffz(unsigned long word)
709 __asm__(" lhi %2,-1\n"
720 "1: tmll %1,0x00ff\n"
727 : "=&d" (result), "+a" (word), "=&d" (reg)
728 : "a" (&_zb_findmap) : "cc" );
733 * ffs: find first bit set. This is defined the same way as
734 * the libc and compiler builtin ffs routines, therefore
735 * differs in spirit from the above ffz (man ffs).
738 extern int __inline__ ffs (int x)
744 __asm__(" slr %0,%0\n"
765 : "=&d" (r), "+d" (x) : : "cc" );
770 * hweightN: returns the hamming weight (i.e. the number
771 * of bits set) of a N-bit word
774 #define hweight32(x) generic_hweight32(x)
775 #define hweight16(x) generic_hweight16(x)
776 #define hweight8(x) generic_hweight8(x)
782 * ATTENTION: intel byte ordering convention for ext2 and minix !!
783 * bit 0 is the LSB of addr; bit 31 is the MSB of addr;
784 * bit 32 is the LSB of (addr+4).
785 * That combined with the little endian byte order of Intel gives the
786 * following bit order in memory:
787 * 07 06 05 04 03 02 01 00 15 14 13 12 11 10 09 08 \
788 * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
791 #define ext2_set_bit(nr, addr) test_and_set_bit((nr)^56, addr)
792 #define ext2_clear_bit(nr, addr) test_and_clear_bit((nr)^56, addr)
793 #define ext2_test_bit(nr, addr) test_bit((nr)^56, addr)
794 static __inline__ unsigned long
795 ext2_find_first_zero_bit(void *vaddr, unsigned long size)
797 unsigned long res, cmp, count;
801 __asm__(" lghi %1,-1\n"
806 "0: clg %1,0(%0,%4)\n"
812 "1: cl %1,0(%0,%4)\n"
823 "3: tmll %2,0xff00\n"
831 : "=&a" (res), "=&d" (cmp), "=&a" (count)
832 : "a" (size), "a" (vaddr), "a" (&_zb_findmap) : "cc" );
833 return (res < size) ? res : size;
836 static __inline__ unsigned long
837 ext2_find_next_zero_bit(void *vaddr, unsigned long size, unsigned long offset)
839 unsigned long *addr = vaddr;
840 unsigned long *p = addr + (offset >> 6);
841 unsigned long word, reg;
842 unsigned long bit = offset & 63UL, res;
848 __asm__(" lrvg %0,%1" /* load reversed, neat instruction */
849 : "=a" (word) : "m" (*p) );
852 /* Look for zero in first 8 byte word */
853 __asm__(" lghi %2,0xff\n"
858 "0: tmll %1,0xffff\n"
862 "1: tmll %1,0xffff\n"
866 "2: tmll %1,0x00ff\n"
873 : "+&d" (res), "+a" (word), "=&d" (reg)
874 : "a" (&_zb_findmap) : "cc" );
876 return (p - addr)*64 + res;
879 /* No zero yet, search remaining full bytes for a zero */
880 res = ext2_find_first_zero_bit (p, size - 64 * (p - addr));
881 return (p - addr) * 64 + res;
884 /* Bitmap functions for the minix filesystem. */
886 #define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
887 #define minix_set_bit(nr,addr) set_bit(nr,addr)
888 #define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
889 #define minix_test_bit(nr,addr) test_bit(nr,addr)
890 #define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
892 #endif /* __KERNEL__ */
894 #endif /* _S390_BITOPS_H */