1 /* $Id: io.h,v 1.41.2.1 2001/12/11 22:50:52 davem Exp $ */
5 #include <linux/kernel.h>
6 #include <linux/types.h>
8 #include <asm/page.h> /* IO address mapping routines need this */
9 #include <asm/system.h>
13 #define __SLOW_DOWN_IO do { } while (0)
14 #define SLOW_DOWN_IO do { } while (0)
16 extern unsigned long virt_to_bus_not_defined_use_pci_map(volatile void *addr);
17 #define virt_to_bus virt_to_bus_not_defined_use_pci_map
18 extern unsigned long bus_to_virt_not_defined_use_pci_map(volatile void *addr);
19 #define bus_to_virt bus_to_virt_not_defined_use_pci_map
21 extern unsigned long phys_base;
22 #define page_to_phys(page) ((((page) - mem_map) << PAGE_SHIFT)+phys_base)
24 /* Different PCI controllers we support have their PCI MEM space
25 * mapped to an either 2GB (Psycho) or 4GB (Sabre) aligned area,
26 * so need to chop off the top 33 or 32 bits.
28 extern unsigned long pci_memspace_mask;
30 #define bus_dvma_to_mem(__vaddr) ((__vaddr) & pci_memspace_mask)
32 static __inline__ u8 inb(unsigned long addr)
36 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */"
38 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
43 static __inline__ u16 inw(unsigned long addr)
47 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */"
49 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
54 static __inline__ u32 inl(unsigned long addr)
58 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */"
60 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
65 static __inline__ void outb(u8 b, unsigned long addr)
67 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */"
69 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
72 static __inline__ void outw(u16 w, unsigned long addr)
74 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */"
76 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
79 static __inline__ void outl(u32 l, unsigned long addr)
81 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */"
83 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
93 extern void outsb(unsigned long addr, const void *src, unsigned long count);
94 extern void outsw(unsigned long addr, const void *src, unsigned long count);
95 extern void outsl(unsigned long addr, const void *src, unsigned long count);
96 extern void insb(unsigned long addr, void *dst, unsigned long count);
97 extern void insw(unsigned long addr, void *dst, unsigned long count);
98 extern void insl(unsigned long addr, void *dst, unsigned long count);
100 /* Memory functions, same as I/O accesses on Ultra. */
101 static __inline__ u8 _readb(unsigned long addr)
105 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */"
107 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
112 static __inline__ u16 _readw(unsigned long addr)
116 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */"
118 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
123 static __inline__ u32 _readl(unsigned long addr)
127 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */"
129 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
134 static __inline__ u64 _readq(unsigned long addr)
138 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */"
140 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
145 static __inline__ void _writeb(u8 b, unsigned long addr)
147 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */"
149 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
152 static __inline__ void _writew(u16 w, unsigned long addr)
154 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */"
156 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
159 static __inline__ void _writel(u32 l, unsigned long addr)
161 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */"
163 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
166 static __inline__ void _writeq(u64 q, unsigned long addr)
168 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */"
170 : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L));
173 #define readb(__addr) (_readb((unsigned long)(__addr)))
174 #define readw(__addr) (_readw((unsigned long)(__addr)))
175 #define readl(__addr) (_readl((unsigned long)(__addr)))
176 #define readq(__addr) (_readq((unsigned long)(__addr)))
177 #define writeb(__b, __addr) (_writeb((u8)(__b), (unsigned long)(__addr)))
178 #define writew(__w, __addr) (_writew((u16)(__w), (unsigned long)(__addr)))
179 #define writel(__l, __addr) (_writel((u32)(__l), (unsigned long)(__addr)))
180 #define writeq(__q, __addr) (_writeq((u64)(__q), (unsigned long)(__addr)))
182 /* Now versions without byte-swapping. */
183 static __inline__ u8 _raw_readb(unsigned long addr)
187 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */"
189 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
194 static __inline__ u16 _raw_readw(unsigned long addr)
198 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */"
200 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
205 static __inline__ u32 _raw_readl(unsigned long addr)
209 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */"
211 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
216 static __inline__ u64 _raw_readq(unsigned long addr)
220 __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */"
222 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
227 static __inline__ void _raw_writeb(u8 b, unsigned long addr)
229 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */"
231 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
234 static __inline__ void _raw_writew(u16 w, unsigned long addr)
236 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */"
238 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
241 static __inline__ void _raw_writel(u32 l, unsigned long addr)
243 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */"
245 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
248 static __inline__ void _raw_writeq(u64 q, unsigned long addr)
250 __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */"
252 : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
255 #define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr)))
256 #define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr)))
257 #define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr)))
258 #define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr)))
259 #define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr)))
260 #define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr)))
261 #define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr)))
262 #define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr)))
264 /* Valid I/O Space regions are anywhere, because each PCI bus supported
265 * can live in an arbitrary area of the physical address range.
267 #define IO_SPACE_LIMIT 0xffffffffffffffffUL
269 /* Now, SBUS variants, only difference from PCI is that we do
270 * not use little-endian ASIs.
272 static __inline__ u8 _sbus_readb(unsigned long addr)
276 __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */"
278 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
283 static __inline__ u16 _sbus_readw(unsigned long addr)
287 __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */"
289 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
294 static __inline__ u32 _sbus_readl(unsigned long addr)
298 __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */"
300 : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
305 static __inline__ void _sbus_writeb(u8 b, unsigned long addr)
307 __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */"
309 : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
312 static __inline__ void _sbus_writew(u16 w, unsigned long addr)
314 __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */"
316 : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
319 static __inline__ void _sbus_writel(u32 l, unsigned long addr)
321 __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */"
323 : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E));
326 #define sbus_readb(__addr) (_sbus_readb((unsigned long)(__addr)))
327 #define sbus_readw(__addr) (_sbus_readw((unsigned long)(__addr)))
328 #define sbus_readl(__addr) (_sbus_readl((unsigned long)(__addr)))
329 #define sbus_writeb(__b, __addr) (_sbus_writeb((__b), (unsigned long)(__addr)))
330 #define sbus_writew(__w, __addr) (_sbus_writew((__w), (unsigned long)(__addr)))
331 #define sbus_writel(__l, __addr) (_sbus_writel((__l), (unsigned long)(__addr)))
333 static inline void *_sbus_memset_io(unsigned long dst, int c, __kernel_size_t n)
342 #define sbus_memset_io(d,c,sz) \
343 _sbus_memset_io((unsigned long)d,(int)c,(__kernel_size_t)sz)
346 _memset_io(void *dst, int c, __kernel_size_t n)
358 #define memset_io(d,c,sz) \
359 _memset_io((void *)d,(int)c,(__kernel_size_t)sz)
362 _memcpy_fromio(void *dst, unsigned long src, __kernel_size_t n)
367 char tmp = readb(src);
375 #define memcpy_fromio(d,s,sz) \
376 _memcpy_fromio((void *)d,(unsigned long)s,(__kernel_size_t)sz)
379 _memcpy_toio(unsigned long dst, const void *src, __kernel_size_t n)
382 unsigned long d = dst;
392 #define memcpy_toio(d,s,sz) \
393 _memcpy_toio((unsigned long)d,(const void *)s,(__kernel_size_t)sz)
395 static inline int check_signature(unsigned long io_addr,
396 const unsigned char *signature,
401 if (readb(io_addr++) != *signature++)
411 /* On sparc64 we have the whole physical IO address space accessible
412 * using physically addressed loads and stores, so this does nothing.
414 #define ioremap(__offset, __size) ((void *)(__offset))
415 #define ioremap_nocache(X,Y) ioremap((X),(Y))
416 #define iounmap(__addr) do { (void)(__addr); } while(0)
418 /* Similarly for SBUS. */
419 #define sbus_ioremap(__res, __offset, __size, __name) \
420 ({ unsigned long __ret; \
421 __ret = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \
422 __ret += (unsigned long) (__offset); \
423 if (! request_region((__ret), (__size), (__name))) \
428 #define sbus_iounmap(__addr, __size) \
429 release_region((__addr), (__size))
433 #define dma_cache_inv(_start,_size) do { } while (0)
434 #define dma_cache_wback(_start,_size) do { } while (0)
435 #define dma_cache_wback_inv(_start,_size) do { } while (0)
439 #endif /* !(__SPARC64_IO_H) */