include/asm-sparc64/pstate.h

   1 /* $Id: pstate.h,v 1.6 1997/06/25 07:39:45 jj Exp $ */
   2 #ifndef _SPARC64_PSTATE_H
   3 #define _SPARC64_PSTATE_H
   4
   5 /* The V9 PSTATE Register (with SpitFire extensions).
   6  *
   7  * -----------------------------------------------------------------------
   8  * | Resv | IG | MG | CLE | TLE |  MM  | RED | PEF | AM | PRIV | IE | AG |
   9  * -----------------------------------------------------------------------
  10  *  63  12  11   10    9     8    7   6   5     4     3     2     1    0
  11  */
  12 #define PSTATE_IG       0x0000000000000800      /* Interrupt Globals.           */
  13 #define PSTATE_MG       0x0000000000000400      /* MMU Globals.                 */
  14 #define PSTATE_CLE      0x0000000000000200      /* Current Little Endian.       */
  15 #define PSTATE_TLE      0x0000000000000100      /* Trap Little Endian.          */
  16 #define PSTATE_MM       0x00000000000000c0      /* Memory Model.                */
  17 #define PSTATE_TSO      0x0000000000000000      /* MM: Total Store Order        */
  18 #define PSTATE_PSO      0x0000000000000040      /* MM: Partial Store Order      */
  19 #define PSTATE_RMO      0x0000000000000080      /* MM: Relaxed Memory Order     */
  20 #define PSTATE_RED      0x0000000000000020      /* Reset Error Debug State.     */
  21 #define PSTATE_PEF      0x0000000000000010      /* Floating Point Enable.       */
  22 #define PSTATE_AM       0x0000000000000008      /* Address Mask.                */
  23 #define PSTATE_PRIV     0x0000000000000004      /* Privilege.                   */
  24 #define PSTATE_IE       0x0000000000000002      /* Interrupt Enable.            */
  25 #define PSTATE_AG       0x0000000000000001      /* Alternate Globals.           */
  26
  27 /* The V9 TSTATE Register (with SpitFire and Linux extensions).
  28  *
  29  * ---------------------------------------------------------------
  30  * |  Resv  |  CCR  |  ASI  |  %pil  |  PSTATE  |  Resv  |  CWP  |
  31  * ---------------------------------------------------------------
  32  *  63    40 39   32 31   24 23    20 19       8 7      5 4     0
  33  */
  34 #define TSTATE_CCR      0x000000ff00000000      /* Condition Codes.             */
  35 #define TSTATE_XCC      0x000000f000000000      /* Condition Codes.             */
  36 #define TSTATE_XNEG     0x0000008000000000      /* %xcc Negative.               */
  37 #define TSTATE_XZERO    0x0000004000000000      /* %xcc Zero.                   */
  38 #define TSTATE_XOVFL    0x0000002000000000      /* %xcc Overflow.               */
  39 #define TSTATE_XCARRY   0x0000001000000000      /* %xcc Carry.                  */
  40 #define TSTATE_ICC      0x0000000f00000000      /* Condition Codes.             */
  41 #define TSTATE_INEG     0x0000000800000000      /* %icc Negative.               */
  42 #define TSTATE_IZERO    0x0000000400000000      /* %icc Zero.                   */
  43 #define TSTATE_IOVFL    0x0000000200000000      /* %icc Overflow.               */
  44 #define TSTATE_ICARRY   0x0000000100000000      /* %icc Carry.                  */
  45 #define TSTATE_ASI      0x00000000ff000000      /* Address Space Identifier.    */
  46 #define TSTATE_PIL      0x0000000000f00000      /* %pil (Linux traps set this)  */
  47 #define TSTATE_PSTATE   0x00000000000fff00      /* PSTATE.                      */
  48 #define TSTATE_IG       0x0000000000080000      /* Interrupt Globals.           */
  49 #define TSTATE_MG       0x0000000000040000      /* MMU Globals.                 */
  50 #define TSTATE_CLE      0x0000000000020000      /* Current Little Endian.       */
  51 #define TSTATE_TLE      0x0000000000010000      /* Trap Little Endian.          */
  52 #define TSTATE_MM       0x000000000000c000      /* Memory Model.                */
  53 #define TSTATE_TSO      0x0000000000000000      /* MM: Total Store Order        */
  54 #define TSTATE_PSO      0x0000000000004000      /* MM: Partial Store Order      */
  55 #define TSTATE_RMO      0x0000000000008000      /* MM: Relaxed Memory Order     */
  56 #define TSTATE_RED      0x0000000000002000      /* Reset Error Debug State.     */
  57 #define TSTATE_PEF      0x0000000000001000      /* Floating Point Enable.       */
  58 #define TSTATE_AM       0x0000000000000800      /* Address Mask.                */
  59 #define TSTATE_PRIV     0x0000000000000400      /* Privilege.                   */
  60 #define TSTATE_IE       0x0000000000000200      /* Interrupt Enable.            */
  61 #define TSTATE_AG       0x0000000000000100      /* Alternate Globals.           */
  62 #define TSTATE_CWP      0x000000000000001f      /* Current Window Pointer.      */
  63
  64 /* Floating-Point Registers State Register.
  65  *
  66  * --------------------------------
  67  * |  Resv  |  FEF  |  DU  |  DL  |
  68  * --------------------------------
  69  *  63     3    2       1      0
  70  */
  71 #define FPRS_FEF        0x0000000000000004      /* Enable Floating Point.       */
  72 #define FPRS_DU         0x0000000000000002      /* Dirty Upper.                 */
  73 #define FPRS_DL         0x0000000000000001      /* Dirty Lower.                 */
  74
  75 /* Version Register.
  76  *
  77  * ------------------------------------------------------
  78  * | MANUF | IMPL | MASK | Resv | MAXTL | Resv | MAXWIN |
  79  * ------------------------------------------------------
  80  *  63   48 47  32 31  24 23  16 15    8 7    5 4      0
  81  */
  82 #define VERS_MANUF      0xffff000000000000      /* Manufacturer.                */
  83 #define VERS_IMPL       0x0000ffff00000000      /* Implementation.              */
  84 #define VERS_MASK       0x00000000ff000000      /* Mask Set Revision.           */
  85 #define VERS_MAXTL      0x000000000000ff00      /* Maximum Trap Level.          */
  86 #define VERS_MAXWIN     0x000000000000001f      /* Maximum Reg Window Index.    */
  87
  88 #if defined(__KERNEL__) && !defined(__ASSEMBLY__)
  89 #define set_pstate(bits)                                        \
  90         __asm__ __volatile__(                                   \
  91                 "rdpr      %%pstate, %%g1\n\t"                  \
  92                 "or        %%g1, %0, %%g1\n\t"                  \
  93                 "wrpr      %%g1, 0x0, %%pstate\n\t"             \
  94                 : /* no outputs */                              \
  95                 : "i" (bits)                                    \
  96                 : "g1")
  97
  98 #define clear_pstate(bits)                                      \
  99         __asm__ __volatile__(                                   \
 100                 "rdpr      %%pstate, %%g1\n\t"                  \
 101                 "andn        %%g1, %0, %%g1\n\t"                \
 102                 "wrpr      %%g1, 0x0, %%pstate\n\t"             \
 103                 : /* no outputs */                              \
 104                 : "i" (bits)                                    \
 105                 : "g1")
 106
 107 #define change_pstate(bits)                                     \
 108         __asm__ __volatile__(                                   \
 109                 "rdpr      %%pstate, %%g1\n\t"                  \
 110                 "wrpr      %%g1, %0, %%pstate\n\t"              \
 111                 : /* no outputs */                              \
 112                 : "i" (bits)                                    \
 113                 : "g1")
 114 #endif
 115
 116 #endif /* !(_SPARC64_PSTATE_H) */